FAN5068 Datasheet, PDF (1/18 Pages) Fairchild Semiconductor – DDR-1/DDR-2 plus ACPI Regulator Combo

www.fairchildsemi.com
FAN5068
DDR-1/DDR-2 plus ACPI Regulator Combo
Features
• PWM regulator for VDDQ (2.5V or 1.8V)
• Linear LDO regulator generates VTT = VDDQ/2, 1.5A
Peak sink/source capability
• 1 independent programable ULDO controllers driving
external N-Channel MOSFET
• ACPI drive and control for 5V DUAL generation
• 3.3V Internal LDO for 3V-ALW generation
• 300kHz fixed frequency switching
• R_DS(ON) current sensing or optional current sense resistor
for precision over-current detect
• Internal Synchronous Boot diode
• Power Good signal for all voltages
• Input Under-Voltage Lock-Out (UVLO)
• Thermal Shutdown
• Latched Multi-Fault Protection
• 24-pin 5x5mm MLP package
Applications
• DDR-1/DDR-2 VDDQ and VTT voltage generation with
ACPI support
• Desktop PC's
• Servers
General Description
The FAN5068 DDR memory regulator combines a high-
efficiency PWM controller to generate the supply voltage,
VDDQ, and a linear regulator to generate VTT, the termina-
tion voltage. Synchronous rectification provides high-
efficiency over a wide range of load currents. Efficiency is
further enhanced by using the low-side MOSFET’s R_DS(ON)
to sense current instead of a series sense resistor.
In S3 mode, only the VDDQ switcher and the 3.3V regula-
tors remain on while the VTT and ULDO regulators are shut
off. To avoid "glitching" the VDDQ output during the transi-
tion from S3 to S0, the three linear regulators use the SS
capacitor to limit their slew rates, thereby limiting the surge
current from the VDDQ output. PGOOD becomes true in S0
only when all 3 regulators have achieved stable outputs.
In S5 (EN = 0), the 3.3V internal LDO stays on, while the
other regulators are powered down.
The VDDQ PWM regulator is a sampled current mode con-
trol with external compensation to achieve fast load transient
response and provide system design optimization.
The VTT regulator derives its reference and takes its power
from the VDDQ PWM regulator output using a precision
internal voltage divider to set its output at 1/2 of VDDQ. The
VTT termination regulator is capable of sourcing or sinking
at least 1.5A peak current.
REV. 1.0.1 9/9/04