ES29DL320 Datasheet, PDF (27/59 Pages) Excel Semiconductor Inc. – 32Mbit(4M x 8/2M x 16) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

ADVANCED INFORMATION
EE SS II
Excel Semiconductor inc.
Sector Erase Time-out Window and DQ3
Status Bits : DQ7,DQ6,DQ2, or RY/BY#
After the command sequence is written, a sector
erase time-out of 50us occurs. During the time-out
period, additional sector addresses and sector
erase commands may be written. Loading the sec-
tor erase buffer may be done in any sequence, and
the number of sectors may be from one sector to all
sectors. The time between these additional cycles
must be less than 50us, otherwise the last address
and command may not be accepted, and erasure
may begin. It is recommended that processor inter-
rupts be disabled during this time to ensure all com-
mands are accepted. The interrupts can be re-
enabled after the last Sector Erase command is
written. The system can monitor DQ3 to determine
if the sector erase timer has timed out (See the sec-
tion on DQ3:Sector Erase Timer.). The time-out
begins from the rising edge of the final WE# pulse
in the command sequence.
Any command other than Sector Erase or Erase
Suspend during the time-out period resets that
bank to the read mode. The system must rewrite
the command sequence and any additional
addresses and commands.
When the Sector Erase Embedded Erase algorithm
is complete, the bank returns to reading array data
and addresses are no longer latched. Note that while
the Embedded Erase operation is in progress, the
system can read data from the non-erasing bank.
The system can determine the status of the erase
operation by reading DQ7,DQ6,DQ2, or RY/BY# in
the erasing bank. Refer to the Write Operation Status
section Table 10 for information on these status bits.
Valid Command during Sector Erase
Once the sector erase operation has begun, only the
Erase Suspend command is valid. All other com-
mands are ignored. However, note that a hardware
reset immediately terminates the erase operation. If
that occurs, the sector erase command sequence
should be reinitiated once that bank has returned to
reading array data, to ensure data integrity.
Fig. 9 illustrates the algorithm for the erase opera-
tion. Refer to the Erase and Program Operations
tables in the AC Characteristics section for parame-
ters, and Fig. 23 section for timing diagrams.
ERASE SUSPEND/ERASE RESUME
START
Write Erase
Command Sequence
(Notes 1,2)
An erase operation is a long-time operation so that
two useful commands are provided in the
ES29DL320 device Erase Suspend and Erase
Resume Commands. Through the two commands,
erase operation can be suspended for a while and
the suspended operation can be resumed later when
it is required. While the erase is suspended, read or
program operations can be performed by the system.
Embedded
Erase
algorithm in
progress
Data Poll to
Erasing Bank
from System
No
Data = FFh?
Yes
Erasure Completed
Notes:
1. See Table 9 for erase command sequence
2. See the section on DQ3 for information on the sector erase timer
Figure 9. Erase Operation
Erase Suspend Command, (B0h)
The Erase Suspend command, B0h, allows the sys-
tem to interrupt a sector erase operation and then
read data from, or program data to, any sector not
selected for erasure. The bank address is required
when writing this command. This command is valid
only during the sector erase operation, including the
50us time-out period during the sector erase com-
mand sequence. The Erase Suspend command is
ignored if written during the chip erase operation or
Embedded Program algorithm. When the Erase Sus-
pend command is written during the sector erase
operation, the device requires a maximum of 20us to
suspend the erase operation. However, when the
Erase Suspend command is written during the sector
erase time-out, the device immediately terminates
the time-out period and suspends the erase opera-
tion.
ES29DL320
27
Rev. 0E May 25, 2006