ES29DL320 Datasheet, PDF (22/59 Pages) Excel Semiconductor Inc. – 32Mbit(4M x 8/2M x 16) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

ADVANCED INFORMATION
COMMAND DEFINITIONS
EE SS II
Excel Semiconductor inc.
Writing specific address and data commands or
sequences into the command register initiates
device operations. Table 9 defines the valid register
command sequences. Note that writing incorrect
address and data values or writing them in the
improper sequence may place the device in an
unknown state. A reset command is required to
return the device to normal operation.
All addresses are latched on the falling edge of WE#
or CE#, whichever happens later. All data is latched
on the rising edge of WE# or CE#, whichever hap-
pens first. Refer to the AC Characteristics section for
timing diagrams.
READING ARRAY DATA
The device is automatically set to reading array data
after device power-up. No commands are required
to retrieve data. Each bank is ready to read array
data after completing an Embedded Program or
Embedded Erase algorithm.
After the device accepts an Erase Suspend com-
mand, the corresponding bank enters the erase-sus-
pend-read mode, after which the system can read
data from any non-erase-suspended sector within
the same bank. After completing a programming
operation in the Erase Suspend mode, the system
may once again read array data with the same
exception. See the Erase Suspend/Erase Resume
Commands section for more information.
The system must issue the reset command to return
a bank to the read (or erase-suspend-read) mode if
DQ5 goes high during an active program or erase
operation, or if the bank is in the autoselect mode.
See the next section, Reset Command, for more
information.
See also Requirements for Reading Array Data in
the Device Bus Operations section for more informa-
tion.The Read-Only Operations table provides the
read parameters, and Fig. 18 shows the timing dia-
gram
RESET COMMAND
Writing the reset command resets the banks to the
read or erase-suspend-read mode. Address bits are
don’t cares for this command.
The reset command may be written between the
sequence cycles in an erase command sequence
before erasing begins. This resets the bank to which
the system was writing to the read mode. Once era-
sure begins, however, the device ignores reset com-
mands until the operation is complete.
The reset command may be written between the
sequence cycles in a program command sequence
before programming begins. This resets the bank to
which the system was writing to the read mode. If
the program command sequence is written to a bank
that is in the Erase Suspend mode, writing the reset
command returns that bank to the erase-suspend-
read mode. Once programming begins, however, the
device ignores reset commands until the operation is
complete.
The reset command may be written between the
sequence cycles in an autoselect command
sequence. Once in the autoselect mode, the reset
command must be written to return to the read
mode. If a bank entered the autoselect mode while
in the Erase Suspend mode, writing the reset com-
mand returns that bank to the erase-suspend-read
mode.
If DQ5 goes high during a program or erase opera-
tion, writing the reset command returns the bank to
the read mode (or erase-suspend-read mode if that
bank was in Erase-Suspend).
ES29DL320
22
Rev. 0E May 25, 2006