ES29DL320 Datasheet, PDF(25/59 Page) Excel Semiconductor Inc. – 32Mbit(4M x 8/2M x 16) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

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ES29DL320 Datasheet, PDF (25/59 Pages) Excel Semiconductor Inc. – 32Mbit(4M x 8/2M x 16) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

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ADVANCED INFORMATION

EE SS II

Excel Semiconductor inc.

BYTE / WORD PROGRAM

The system may program the device by word or

byte, depending on the state of the BYTE# pin.

Programming is a four-bus-cycle operation. The

program command sequence is initiated by writing

two unlock write cycles, followed by the program

set-up command. The program address and data

are written next, which in turn initiate the Embedded

Program algorithm. The system is not required to

provide further controls or timings. The device auto-

matically provides internally generated program

pulses and verifies the programmed cell margin.

Table 9 shows the address and data requirements

for the byte program command sequence. Note that

the autoselect, commands related with the security

sector, and CFI modes are unavailable while a pro-

gramming operation is in progress.

START

Write Program Com-

mand Sequence

Embedded

Program

algorithm in

progress

Increment Address

Data Poll

from System

Verify Data?

Yes

Last Address?

Yes

Programming

Completed

Note: See Table 9 for program command sequence

Figure 8. Program Operation

Program Status Bits : DQ7, DQ6 or RY/BY#

When the Embedded Program algorithm is com-

plete, that bank then returns to the read mode and

addresses are no longer latched. The system can

determine the status of the program operation by

using DQ7, DQ6, or RY/BY#. Refer to the Write

Operation Status section Table 10 for information on

these status bits.

Any Commands Ignored during Program-

ming Operation

Any commands written to the device during the

Embedded Program algorithm are ignored. Note that

a hardware reset can immediately terminates the

program operation. The program command

sequence should be reinitiated once that bank has

returned to the read mode, to ensure data integrity.

Programming from â0â back to â1â

Programming is allowed in any sequence and

across sector boundaries. But a bit cannot be pro-

grammed from â0â back to a â1â. Attempting to do so

may cause that bank to set DQ5 = 1, or cause the

DQ7 and DQ6 status bits to indicate the operation

was successful. However, a succeeding read will

show that the data is still â0â. Only erase operations

can convert a â0â to a â1â.

Unlock Bypass

In the ES29DL320 device, an unlock bypass pro-

gram mode is provided for faster programming oper-

ation. In this mode, two cycles of program command

sequences can be saved. To enter this mode, an

unlock bypass enter command should be first written

to the system. The unlock bypass enter command

sequence is initiated by first writing two unlock

cycles. This is followed by a third write cycle contain-

ing the unlock bypass command, 20h. That bank

then enters the unlock-bypass program mode. A

two-cycle unlock bypass program command

sequence is all that is required to program in this

mode. The first cycle in this sequence contains the

unlock bypass program set-up command, A0h; the

second cycle contains the program address and

data. Additional data is programmed in the same

manner. This mode dispenses with the initial two

unlock cycles required in the standard program com-

mand sequence, resulting in faster total program-

ming time. Table 9 shows the requirements for the

command sequence.

ES29DL320

Rev. 0E May 25, 2006

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