XRT75L06 Datasheet, PDF (7/63 Pages) Exar Corporation – SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR

SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75L06
REV. 1.0.3
PIN DESCRIPTIONS (BY FUNCTION)
TRANSMIT INTERFACE
LEAD #
T15
R16
R15
N14
P14
P13
SIGNAL NAME
TxON_0
TxON_1
TxON_2
TxON_3
TxON_4
TxON_5
TYPE
DESCRIPTION
I ^{Transmitter ON Input - Channel 0:}
Transmitter ON Input - Channel 1:
Transmitter ON Input - Channel 2:
Transmitter ON Input - Channel 3:
Transmitter ON Input - Channel 4:
Transmitter ON Input - Channel 5:
These pins are active only when the corresponding TxON bits are set.
Table below shows the status of the transmitter based on theTxON bit and TxON
pin settings.
Bit
Pin
Transmitter Status
0
0
OFF
0
1
OFF
1
0
OFF
1
1
ON
E3
TxCLK_0
M3
TxCLK_1
F15
TxCLK_2
P16
TxCLK_3
G3
TxCLK_4
H15
TxCLK_5
NOTES:
1. These pins will be active and can control the TTIP and TRING outputs only
when the TxON_n bits in the channel register are set .
2. When Transmitters are turned off the TTIP and TRING outputs are Tri-
stated.
3. These pins are internally pulled up.
I Transmit Clock Input for TPOS and TNEG - Channel 0:
Transmit Clock Input for TPOS and TNEG - Channel 1:
Transmit Clock Input for TPOS and TNEG - Channel 2:
Transmit Clock Input for TPOS and TNEG - Channel 3:
Transmit Clock Input for TPOS and TNEG - Channel 4:
Transmit Clock Input for TPOS and TNEG - Channel 5:
The frequency accuracy of this input clock must be of nominal bit rate ± 20 ppm.
The duty cycle can be 30%-70%.
By default, input data is sampled on the falling edge of TxCLK.
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