XRT75L06 Datasheet, PDF (19/63 Pages) Exar Corporation – SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR

SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75L06
REV. 1.0.3
1.0 CLOCK SYNTHESIZER
The LIU uses a flexible user interface for accepting clock references to generate the internal master clocks
used to drive the LIU. The reference clock used to supply the microprocessor timing is generated from the DS-
3 or SFM clock input. Therefore, if the chip is configured for STS-1 only or E3 only, then the DS-3 input pin
must be connected to the STS-1 pin or E3 pin respectively. In DS-3 mode or when SFM is used, the STS-1
and E3 input pins can be left unconnected. If SFM is enabled by pulling the SFM_EN pin "High", 12.288MHz is
the only clock reference necessary to generate DS-3, E3, or STS-1 line rates and the microprocessor timing.
A simplified block diagram of the clock synthesizer is shown in Figure 3
FIGURE 3. SIMPLIFIED BLOCK DIAGRAM OF THE INPUT CLOCK CIRCUITRY DRIVING THE MICROPROCESSOR
SFM_EN STS-1Clk/12M DS3Clk
E3Clk
Clock Synthesizer
0
µProcessor
1
CLKOUT_n
LOL_n
1.1 Clock Distribution
Network cards that are designed to support multiple line rates which are not configured for single frequency
mode should ensure that a clock is applied to the DS3Clk input pin. For example: If the network card being
supplied to an ISP requires E3 only, the DS-3 input clock reference is still necessary to provide read and write
access to the internal microprocessor. Therefore, the E3 mode requires two input clock references. If
however, multiple line rates will not be supported, i.e. E3 only, then the DS3Clk input pin may be hard wire
connected to the E3Clk input pin.
FIGURE 4. CLOCK DISTRIBUTION CONGIFURED IN E3 MODE WITHOUT USING SFM
DS3Clk
E3Clk
Clock Synthesizer
µProcessor
CLKOUT_n
LOL_n
NOTE: For one input clock reference, the single frequency mode should be used.
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