XRT75L06 Datasheet, PDF (56/63 Pages) Exar Corporation – SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR

XRT75L06
REV. 1.0.3
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
TABLE 18: REGISTER MAP DESCRIPTION - CHANNEL N
ADDRESS
(HEX)
TYPE
REGISTER
NAME
BIT#
SYMBOL
DESCRIPTION
DEFAULT
VALUE
D0 TxLEV_n This bit should be set when the transmitter is driving
0
a line greater than 225 feet in the DS3 or STS-1
modes. It is not active in E3 mode.
D1 TxCLKINV Set this bit to sample the data on TPOS/TNEG pins
0
_n
on the rising edge of TxCLK.Default is to sample on
the falling edge of TxCLK.
0x04 (ch 0) R/W Transmit
0x14 (ch 1)
Control
D2 TAOS_n This bit should be set to transmit a continuous “all
ones” data pattern. Timing will come from TxCLK if
0
0x24 (ch 2)
0x34 (ch 3)
available otherwise from channel refernce clock.
0x44 (ch 4)
D3
0x54 (ch 5)
Reserved
D4 INSPRBS_ This bit causes a single bit error to be inserted in the
0
n
transmitted PRBS pattern if the PRBS generator/
detector has been enabled.
D5 TxMON_n When set, this bit enables the DMO circuit to moni-
0
tor its own channel’s transmit driver. Otherwise, it
uses the MTIP/MRING pins to monitor another
channel or device.
D7-D6
Reserved
D0 REQEN_n This bit enables the Receiver Equalizer. When set,
0
the equalizer boosts the high frequency components
of the signal to make up for cable losses.
NOTE: See section 5.01 for detailed description.
D1 RxMON_n Set this bit to place the Receiver in the monitoring
0
mode. In this mode, it can process signals (at RTIP/
0x05 (ch 0) R/W Receive
RRING) with 20dB of flat loss. This mode allows the
0x15 (ch 1)
Control
channel to act as monitor of aline without loading the
0x25 (ch 2)
circuit.
0x35 (ch 3)
0x45 (ch 4)
0x55 (ch 5)
D2 LOSMUT_ When set, the data on RPOS/RNEG is forced to
0
n
zero when LOS occurs. Thus any residual noise on
the line is not output as spurious data.
NOTE: If this bit has been set, it will remain set evan
after the LOS condition is cleared.
D3 RxCLKINV When this bit is set, RPOS and RNEG will change
0
_n
on the falling edge of RCLK.Default is for the data to
change on the rising edge of RCLK and be sampled
by the terminal equipment on the falling edge of
RCLK.
D4 ALOSDIS_ This bit is set to disable the ALOS detector. This flag
0
n
and the DLOSDIS are normally used in diagnostic
mode. Normal operation of DS3 and STS-1 would
have ALOS disabled.
D5 DLOSDIS_ This bit disables the digital LOS detector. This would
0
n
normally be disabled in E3 mode as E3 is a function
of the level of the input.
D7-D6
Reserved
53