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XRT75L06 Datasheet, PDF (29/63 Pages) Exar Corporation – SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
FIGURE 17. DUAL-RAIL DATA FORMAT (ENCODER AND DECODER ARE DISABLED)
XRT75L06
REV. 1.0.3
Data
TPData
TNData
TxClk
1
1
0
3.2 Transmit Clock
The Transmit Clock applied via TxClk_n pins, for the selected data rate (for E3 = 34.368 MHz, DS3 = 44.736
MHz or STS-1 = 51.84 MHz), is duty cycle corrected by the internal PLL circuit to provide a 50% duty cycle
clock to the pulse shaping circuit. This allows a 30% to 70% duty cycle Transmit Clock to be supplied.
3.3 B3ZS/HDB3 ENCODER
When the Single-Rail (NRZ) data format is selected, the Encoder Block encodes the data into either B3ZS
format (for either DS3 or STS-1) or HDB3 format (for E3).
3.3.1 B3ZS Encoding
An example of B3ZS encoding is shown in Figure 18. If the encoder detects an occurrence of three
consecutive zeros in the data stream, it is replaced with either B0V or 00V, where ‘B’ refers to Bipolar pulse
that is compliant with the Alternating polarity requirement of the AMI (Alternate Mark Inversion) line code and
‘V’ refers to a Bipolar Violation (e.g., a bipolar pulse that violates the AMI line code). The substitution of B0V or
00V is made so that an odd number of bipolar pulses exist between any two consecutive violation (V) pulses.
This avoids the introduction of a DC component into the line signal.
FIGURE 18. B3ZS ENCODING FORMAT
TClk
TPDATA 1 0 1 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0
Line 1 0
100V 0
00
B0V
Signal
1
1
V
B
V
3.3.2 HDB3 Encoding
An example of the HDB3 encoding is shown in Figure 19. If the HDB3 encoder detects an occurrence of four
consecutive zeros in the data stream, then the four zeros are substituted with either 000V or B00V pattern. The
substitution code is made in such a way that an odd number of pulses exist between any consecutive V pulses.
This avoids the introduction of DC component into the analog signal.
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