English
Language : 

XRT73LC04A_08 Datasheet, PDF (7/64 Pages) Exar Corporation – 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73LC04A
REV. 1.0.2
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
4.2 THE DIGITAL LOCAL LOOP-BACK MODE. ......................................................................................... 48
Figure 34.The Digital Local Loop-Back path within a given channel .............................................................. 48
COMMAND REGISTER CR4-(N) ............................................................................................................ 48
4.3 THE REMOTE LOOP-BACK MODE ................................................................................................... 49
Figure 35.The Remote Loop-Back path, within a given channel .................................................................... 49
COMMAND REGISTER CR4-(n) ............................................................................................................ 49
4.4 TXOFF FEATURES ......................................................................................................................... 50
COMMAND REGISTER CR1-(N) ............................................................................................................ 50
Table 6:The Relationship Between the TxOFF Input Pin, the TxOFF Bit Field and the State of the Transmitter
50
4.5 THE TRANSMIT DRIVE MONITOR FEATURES .................................................................................... 50
Figure 36.The XRT73LC04A employing the Transmit Drive Monitor Features .............................................. 51
4.6 THE TAOS (TRANSMIT ALL ONES) FEATURE ................................................................................. 51
COMMAND REGISTER CR1-(N) ............................................................................................................ 51
5.0 THE MICROPROCESSOR SERIAL INTERFACE ................................................................................... 51
5.1 DESCRIPTION OF THE COMMAND REGISTERS .................................................................................. 51
Table 7:Hexadecimal Addresses and Bit Formats of XRT73LC04A Command Registers ............................ 52
5.2 DESCRIPTION OF BIT-FIELDS FOR EACH COMMAND REGISTER ......................................................... 53
Command Register - CR0-(n) ............................................................................................................ 53
COMMAND REGISTER CR0-(N) ............................................................................................................. 53
COMMAND REGISTER CR1-(N) ............................................................................................................ 54
Command Register CR2-(n) .............................................................................................................. 54
COMMAND REGISTER CR2-(N) ............................................................................................................ 54
COMMAND REGISTER CR3-(N) ............................................................................................................ 55
COMMAND REGISTER CR4-(N) ............................................................................................................ 56
Table 8:Contents of LLB_(n) and RLB_(n) and the Corresponding Loop-Back Mode for Channel(n) ........... 56
5.3 OPERATING THE MICROPROCESSOR SERIAL INTERFACE. ................................................................. 56
Figure 37.Microprocessor Serial Interface Data Structure ............................................................................. 57
Figure 38.Timing Diagram for the Microprocessor Serial Interface ................................................................ 58
ORDERING INFORMATION ..................................................................................................... 59
PACKAGE DIMENSIONS ........................................................................................................ 59
REVISION HISTORY ..................................................................................................................................... 60
IV