XRT73LC04A_08 Datasheet, PDF (48/64 Pages) Exar Corporation – 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT

XRT73LC04A
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
RPOS_(n) and RNEG_(n) output pins on the rising
edge of RxClk_(n).
FIGURE 29. HOW THE XRT73LC04A OUTPUTS DATA ON THE RPOS AND RNEG OUTPUT PINS
REV. 1.0.2
RPOS
RNEG
RxClk
RxClk_(n) is the Recovered Clock signal from the in-
coming Received line signal. As a result, these clock
signals are typically 34.368 MHz for E3 applications,
44.736 MHz for DS3 applications and 51.84 MHz for
SONET STS-1 applications.
In general, if a given channel received a positive-po-
larity pulse in the incoming line signal via the
RTIP_(n) and RRing_(n) input pins, then the channel
pulses its corresponding RPOS_(n) output pin “High".
Conversely, if the channel received a negative-polari-
ty pulse in the incoming line signal via the RTIP_(n)
and RRing_(n) input pins, then the channel(n) pulses
its corresponding RNEG_(n) output pin “High".
Inverting the RxClk_(n) outputs
Each channel can invert the RxClk_(n) signals with
respect to the delivery of the RPOS_(n) and
RNEG_(n) output data to the Receiving Terminal
Equipment. This feature may be useful for those cus-
tomers whose Receiving Terminal Equipment logic
design is such that the RPOS_(n) and RNEG_(n) da-
ta must be sampled on the rising edge of RxClk_(n).
Figure 30 illustrates the behavior of the RPOS_(n),
RNEG_(n) and RxClk_(n) signals when the
RxClk_(n) signal has been inverted.
In the Hardware Mode:
Setting the RxClkINV pin “High” results in all chan-
nels of the XRT73LC04A to output the recovered data
on RPOS_(n) and RNEG_(n) on the falling edge of
RxClk_(n). Setting this pin “Low” results in the recov-
ered data on RPOS_(n) and RNEG_(n) to output on
the rising edge of RxClk_(n).
FIGURE 30. THE BEHAVIOR OF THE RPOS, RNEG, AND RXCLK SIGNALS WHEN RXCLK IS INVERTED
RPOS
RNEG
RxClk
a. Operating in the HOST Mode
In order to configure a channel(n) to invert the
RxClk_(n) output signal, the XRT73LC04A must be
operating in the HOST Mode.
To invert RxClk_(n), associated with Channel(n),
write a "1" into the RxClk_(n)INV bit-field within Com-
mand Register CR-3.
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