XR16M564 Datasheet, PDF (6/55 Pages) Exar Corporation – 1.62V TO 3.63V QUAD UART WITH 32-BYTE FIFO

XR16M564/564D
1.62V TO 3.63V QUAD UART WITH 32-BYTE FIFO
Pin Description
REV. 1.0.0
NAME
48-QFN
PIN #
64-LQFP 68-PLCC 80-LQFP
PIN #
PIN #
PIN #
TYPE
DESCRIPTION
INTSEL
38
-
65
6
I Interrupt Select (active high, input with internal pull-
down).
When 16/68# pin is HIGH for Intel bus interface, this
pin can be used in conjunction with MCR bit-3 to
enable or disable the INT A-D pins or override MCR
bit-3 and enable the interrupt outputs. Interrupt out-
puts are enabled continuously when this pin is HIGH.
MCR bit-3 enables and disables the interrupt output
pins. In this mode, MCR bit-3 is set to a logic 1 to
enable the continuous output. See MCR bit-3 descrip-
tion for full detail. This pin must be LOW in the Motor-
ola bus interface mode. For the 64 pin packages, this
pin is bonded to VCC internally in the XR16M564D so
the INT outputs operate in the continuous interrupt
mode. This pin is bonded to GND internally in the
XR16M564 and therefore requires setting MCR bit-3
for enabling the interrupt output pins.
MODEM OR SERIAL I/O INTERFACE
TXA
6
8
17
29
O UART channels A-D Transmit Data and infrared trans-
TXB
8
10
19
32
TXC
28
39
51
69
TXD
30
41
53
72
mit data. Standard transmit and receive interface is
enabled when MCR[6] = 0. In this mode, the TX signal
will be a HIGH during reset, or idle (no data). Infrared
IrDA transmit and receive interface is enabled when
MCR[6] = 1. In the Infrared mode, the inactive state
(no data) for the Infrared encoder/decoder interface is
a logic 0.
RXA
48
62
7
17
I UART channel A-D Receive Data or infrared receive
RXB
13
20
29
44
data. Normal receive data input must idle HIGH.
RXC
22
29
41
57
RXD
36
51
63
4
RTSA#
3
5
14
26
O UART channels A-D Request-to-Send (active low) or
RTSB#
11
13
22
35
general purpose output. This output must be asserted
RTSC#
25
36
48
66
RTSD#
33
44
56
75
prior to using auto RTS flow control, see EFR[6],
MCR[1], and IER[6]. Also see Figure 11. If these
outputs are not used, leave them unconnected.
CTSA#
1
2
11
23
I UART channels A-D Clear-to-Send (active low) or gen-
CTSB#
12
16
25
38
CTSC#
23
33
45
63
CTSD#
35
47
59
78
eral purpose input. It can be used for auto CTS flow
control, see EFR[7], and IER[7]. Also see Figure 11.
These inputs should be connected to VCC when not
used.
DTRA#
-
DTRB#
-
DTRC#
-
DTRD#
-
3
12
24
O UART channels A-D Data-Terminal-Ready (active low)
15
24
37
34
46
64
or general purpose output. If these outputs are not
used, leave them unconnected.
46
58
77
DSRA#
-
DSRB#
-
DSRC#
-
DSRD#
-
1
10
22
I UART channels A-D Data-Set-Ready (active low) or
17
26
39
32
44
62
48
60
79
general purpose input. This input should be connected
to VCC when not used. This input has no effect on the
UART.
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