XR16M564 Datasheet, PDF (25/55 Pages) Exar Corporation – 1.62V TO 3.63V QUAD UART WITH 32-BYTE FIFO

XR16M564/564D
REV. 1.0.0
1.62V TO 3.63V QUAD UART WITH 32-BYTE FIFO
TABLE 10: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1
ADDRESS REG READ/
A2-A0 NAME WRITE
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3 BIT-2 BIT-1 BIT-0 COMMENT
16C550 Compatible Registers
0 0 0 RHR RD Bit-7 Bit-6 Bit-5
Bit-4
Bit-3 Bit-2 Bit-1 Bit-0
0 0 0 THR WR Bit-7 Bit-6 Bit-5
Bit-4
Bit-3 Bit-2 Bit-1 Bit-0
001
IER RD/WR 0/
0/
0/
0/
Modem RX Line TX
RX
CTS# RTS# Xoff Int.
Int.
Int. Enable
Enable Enable
Sleep
Mode
Enable
Stat. Int. Stat. Empty Data
Enable Int.
Int
Int.
Enable Enable Enable
010
010
ISR
FCR
RD FIFOs FIFOs
0/
Enabled Enabled
RTS
CTS
Int
0/
INT
INT INT INT ^{LCR[7] = 0}
Source Source Source Source
Xoff
Bit-3 Bit-2 Bit-1 Bit-0
Int
WR RXFIFO RXFIFO 0/
0/
Trigger Trigger
TXFIFO TX FIFO
Trigger Trigger
DMA
Mode
Enable
TX
FIFO
Reset
RX FIFOs
FIFO Enable
Reset
011
LCR RD/WR Divisor Set TX Set
Enable Break _Parity
Even
Parity
Parity
Enable
Stop
Bits
Word Word
Length Length
Bit-1 Bit-0
100
MCR RD/WR
0/
BRG
Pres-
caler
0/
IR Mode
ENable
0/
Xon Any
Internal
Lopback
Enable
INT Out-
put
Enable
(OP2#)
Rsvd RTS# DTR#
(OP1#) ^{Output Output}
Control Control
101
LSR RD/WR RX FIFO THR &
Global TSR
Error Empty
THR RX Break RX
Empty
Framing
Error
RX
Parity
Error
RX
Over-
run
Error
RX
Data LCR[7] = 0
Ready
110
111
000
001
010
MSR RD/WR CD#
Input
SPR RD/WR Bit-7
DLL RD/WR Bit-7
DLM RD/WR Bit-7
DLD RD/WR Rsvd
RI#
Input
DSR#
Input
CTS#
Input
Delta
CD#
Bit-6 Bit-5
Bit-4
Bit-3
Baud Rate Generator Divisor
Bit-6 Bit-5
Bit-4
Bit-3
Bit-6 Bit-5
Bit-4
Bit-3
Rsvd 4X Mode 8X Mode Bit-3
Delta Delta Delta
RI# DSR# CTS#
Bit-2 Bit-1 Bit-0
Bit-2
Bit-2
Bit-2
Bit-1
Bit-1
Bit-1
Bit-0 LCR[7]=1
LCR≠0xBF
Bit-0
Bit-0
LCR[7] = 1
LCR≠0xBF
EFR[4] = 1
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