XRT73L00A Datasheet, PDF (39/53 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT

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XRT73L00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 2.0.1
To enable this feature, access the Microprocessor Se-
rial Interface and write a “1” into the LOSMUT bit-field
in Command Register 3.
COMMAND REGISTER CR3 (ADDRESS = 0X03)
D4
D3
D2
D1
D0
RNRZ LOSMUT CLK2DIS RCLK2INV CLK1INV
X
1
X
X
X
NOTE: The XRT73L00A automatically declares an LOS
Condition any time it has been configured to operate in
either the Analog Local Loop-Back or Digital Local Loop-
Back Modes. Muting -upon -LOS must be disabled prior to
configuring the device to operate in either of these local
Loop-Back modes.
3.7 ROUTING THE RECOVERED TIMING AND DATA
INFORMATION TO THE RECEIVING TERMINAL
EQUIPMENT
The XRT73L00A ultimately takes the Recovered Tim-
ing and Data information, converts it into CMOS lev-
els and routes it to the Receiving Terminal Equipment
via the RPOS, RNEG, RCLK1 and RCLK2 output
pins.
The XRT73L00A can deliver the recovered data and
clock information to the Receiving Terminal in either a
Single-Rail or Dual-Rail format.
Routing Dual-Rail Format Data to the Receiving
Terminal Equipment
Whenever the XRT73L00A delivers Dual-Rail format
to the Terminal Equipment it does so via the following
output signals.
• RPOS
• RNEG
• RCLK1
• RCLK2
Figure 24 illustrates the typical interface for the trans-
mission of data in a Dual-Rail Format from the Re-
ceive Section of the XRT73L00A to the Receiving
Terminal Equipment.
FIGURE 24. THE TYPICAL INTERFACE FOR THE TRANSMISSION OF DATA IN A DUAL-RAIL FORMAT FROM THE
RECEIVE SECTION OF THE XRT73L00A TO THE RECEIVING TERMINAL EQUIPMENT
Terminal
Equipment
(E3/DS3 or STS-1
Framer)
RxPOS
RxNEG
RCLK1, 2
RPOS
RNEG
Receive
Logic
RCLK1, 2 ^Block
Exar E3/DS3/STS-1 LIU
The manner that the LIU transmits Dual-Rail data to
the Receiving Terminal Equipment is described below
and illustrated in Figure 25. The XRT73L00A typical-
ly updates the data on the RPOS and RNEG output
pins on the rising edge RCLK1 (or RCLK2).
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