XRT73L00A Datasheet, PDF (35/53 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT

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XRT73L00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 2.0.1
FIGURE 20. AN EXAMPLE OF B3ZS DECODING
Line Signal
RCLK
00 V
B 0V
RPOS
RNEG
Data
01011000101111011011001110001
3.5.2 HDB3 Decoding E3 Applications
If the XRT73L00A is configured to operate in the E3
Mode, the HDB3/B3ZS Decoding Block performs
HDB3 Decoding. When the Decoder is operating in
this mode it parses through the incoming Dual-Rail
data and checks for the occurrence of either a “000V”
or a “B00V” pattern. If the HDB3 Decoder detects
this particular pattern, it substitutes these bits with a
“0000” pattern.
Figure 21 illustrates the HDB3 Decoder at work with
two separate Zero Suppression patterns in the in-
coming Dual-Rail Data Stream.
FIGURE 21. AN EXAMPLE OF HDB3 DECODING
Line Signal
00 0 V
RCLK
B 00 V
RPOS
RNEG
Data 0 1 0 1 1 0 0 0 0 0 1 1 1 1 0 1 1 0 1 1 0 0 1 1 0 0 0 0 1
NOTE: If the HDB3 Decoder detects any bipolar violation
(e.g., “V”) pulses that is not in accordance with the HDB3
Line Code format, or if the HDB3 Decoder detects a string
of 4 (or more) “0’s” in the incoming line signal, then the
HDB3 Decoder flags this event as a Line Code Violation by
pulsing the LCV output pin “High”.
3.5.3 Enabling/Disabling the HDB3/B3ZS
Decoder
The HDB3/B3ZS Decoder of the XRT73L00A can be
enabled or disabled by either of the following means:
If the XRT73L00A is operating in the Hardware
Mode:
Enable the HDB3/B3ZS Encoder/Decoder by pulling
the ENDECDIS input pin (pin 21) to GND. To disable
the HDB3/B3ZS Encoder/Decoder, pull the ENDEC-
DIS input pin to VDD.
If the XRT73L00A is operating in the HOST Mode:
Enable the XRT73L00A HDB3/B3ZS Encoder/Decod-
er by writing a “0” into the ENDECDIS bit-field in
Command Register CR2. To disable the HDB3/B3ZS
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