XR88C92 Datasheet, PDF (3/32 Pages) Exar Corporation – DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER

Block Diagram
D 0-D 7
-IO R
-IO W
RESET
A 0-A 3
-C S
-IN T
XTAL1
XTAL2
Rev. 1.31
XR88C92/192
Channel A
Transm it
F IF O
R egisters
Transm it
S h ift
R egister
F low
C ontrol
L o g ic
R eceive
F IF O
R egisters
R eceive
S h ift
R egister
F low
C ontrol
L o g ic
W atch
Dog
Tim er
Channel B
Transm it
F IF O
R egisters
Transm it
S h ift
R egister
F low
C ontrol
L o g ic
R eceive
F IF O
R egisters
R eceive
S h ift
R egister
F low
C ontrol
L o g ic
W atch
Dog
Tim er
M ulti-
Purpose
I/O
C on trol
Logic
TXA
RXA
TXB
RXB
O P 0-O P 7
IP0-IP6
3