XR88C92 Datasheet, PDF (15/32 Pages) Exar Corporation – DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER

XR88C92/192
A3 A2 A1 A0
0000
1000
0000
1000
0000
1000
0001
1001
0001
1001
0010
1010
0011
1011
0011
1011
0100
0100
0101
0101
0110
0111
1100
1 101
1101
1110
1110
1111
1111
Register
[Default]
BIT-7
BIT-6
BIT-5
BIT-4
MRA0[00]
MRB0[00]
MRA1[00]
MRB1[00]
MRA2[00]
MRB2[00]
Watch
dog timer
RX
trigger
level [1]
RX
RTS
control
RX
trigger
level [0]
Loopback Loopback
mode
mode
select
select
TX
trigger
level [1]
Error
mode
TX
RTS
control
TX
trigger
level [0]
Parity
mode
Auto
CTS
control
SRA[00]
SRB[00]
CSRA[00]
CSRB[00]
CRA[00]
CRB[00]
Received Framing
break
error
Parity
error
Overrun
error
RX
clock
RX
clock
RX
clock
RX
clock
Misc.
Misc.
Misc.
Misc.
command command command command
RXA[XX]
RXB[XX]
TXA[XX]
TXB[XX]
IPCR[00]
ACR[00]
ISR[00]
IMR[00]
CTPU[00]
CUR[00]
CTPL[00]
CLR[00]
GPR[00]
IPR[XX]
Bit-7
Bit-6
Bit-7
Bit-6
Delta
IP3
Baud
rate set
select
Input
port
change
Input
port
change
Bit-15
Delta
IP2
C/T
mode
Delta
break B
Delta
break B
Bit-14
Bit-7
Bit-6
Bit-7
Not
Used
Bit-6
IP6
Bit-5
Bit-5
Delta
IP1
C/T
mode
RxB
ready
RxB
ready
Bit-13
Bit-5
Bit-5
IP5
Bit-4
Bit-4
Delta
IP0
C/T
mode
TxB
ready
TxB
ready
Bit-12
Bit-4
Bit-4
IP4
OPCR[00]
STCR[XX]
SOPR[00]
SPCR[XX]
ROPR[00]
OP7
X
Bit-7
X
Bit-7
OP6
X
Bit-6
X
Bit-6
OP5
X
Bit-5
X
Bit-5
OP4
X
Bit-4
X
Bit-4
BIT-3
Not
used
Parity
mode
Stop
bit
length
Tx
empty
TX
clock
TX
disable
Bit-3
Bit-3
IP3
input
Delta
IP3
int.
C/T
ready
C/T
ready
Bit-11
Bit-3
Bit-3
IP3
OP3
X
Bit-3
X
Bit-3
BIT-2
BIT-1
Baud
rate
ext. 2
Parity
type
Factory
test
mode
Word
length
Stop
bit
length
Tx
ready
TX
clock
TX
enable
Bit-2
Stop
bit
length
Rx FIFO
full
TX
clock
RX
disable
Bit-1
Bit-2
Bit-1
IP2
input
Delta
IP2
int.
Delta
break A
IP1
input
Delta
IP1
int.
RxA
ready
Delta
break A
RxA
ready
Bit-10
Bit-9
Bit-2
Bit-1
Bit-2
IP2
OP3
X
Bit-2
X
Bit-2
Bit-1
IP1
OP2
X
Bit-1
X
Bit-1
BIT-0
Baud
rate
ext. 1
Word
length
Stop
bit
length
Rx
ready
TX
clock
RX
enable
Bit-0
Bit-0
IP0
input
Delta
IP0
int.
TxA
ready
TxA
ready
Bit-8
Bit-0
Bit-0
IP0
OP2
X
Bit-0
X
Bit-0
Rev. 1.31
15