XR16C2852_05 Datasheet, PDF (27/51 Pages) Exar Corporation – 2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS

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REV. 2.1.1
XR16C2852
2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
FCR[3]: DMA Mode Select
Controls the behavior of the TXRDY# and RXRDY# pins. See DMA operation section for details.
• Logic 0 = Normal Operation (default).
• Logic 1 = DMA Mode.
FCR[5:4]: Transmit FIFO Trigger Select
(logic 0 = default, TX trigger level = 1)
These 2 bits set the trigger level for the transmit FIFO. The UART will issue a transmit interrupt when the
number of characters in the FIFO falls below the selected trigger level, or when it gets empty in case that the
FIFO did not get filled over the trigger level on last re-load. Table 10 below shows the selections. EFR bit-4
must be set to ‘1’ before these bits can be accessed. Note that the receiver and the transmitter cannot use
different trigger tables. Whichever selection is made last applies to both the RX and TX side.
FCR[7:6]: Receive FIFO Trigger Select
(logic 0 = default, RX trigger level =1)
The FCTR Bits 5-4 are associated with these 2 bits. These 2 bits are used to set the trigger level for the receive
FIFO. The UART will issue a receive interrupt when the number of the characters in the FIFO crosses the
trigger level. Table 10 shows the complete selections. Note that the receiver and the transmitter cannot use
different trigger tables. Whichever selection is made last applies to both the RX and TX side.
TRIGGER
TABLE
Table-A
Table-B
Table-C
Table-D
TABLE 10: TRANSMIT AND RECEIVE FIFO TRIGGER TABLE AND LEVEL SELECTION
FCTR FCTR FCR
BIT-5 BIT-4 BIT-7
FCR
BIT-6
FCR
BIT-5
FCR
RECEIVE
BIT-4 TRIGGER LEVEL
TRANSMIT
TRIGGER
LEVEL
COMPATIBILITY
0
0
0
0
1 (default) 16C550, 16C2550,
0
0
0
1
1 (default)
4
16C2552, 16C554,
16C580
1
0
8
1
1
14
0
1
0
0
0
1
1
0
1
1
0
0
8
0
1
16
1
0
24
1
1
28
16
16C650A
8
24
30
1
0
0
0
0
1
1
0
1
1
0
0
8
0
1
16
1
0
56
1
1
60
8
16C654
16
32
56
1
1
X
X
X
X Programmable Programmable 16L2752, 16L2750,
via TRG
register.
via TRG
register.
16C2850, 16C850,
16C854, 16C864
FCTR[7] = 0. FCTR[7] = 1.
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