XR16C2852_05 Datasheet, PDF (21/51 Pages) Exar Corporation – 2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS

xr
REV. 2.1.1
XR16C2852
2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
3.0 UART INTERNAL REGISTERS
Each of the UART channel in the 2852 has its own set of configuration registers selected by address lines A0,
A1 and A2 with CS# and CHSEL selecting the channel. The complete register set is shown in Table 7 and
Table 8.
TABLE 7: UART CHANNEL A AND B UART INTERNAL REGISTERS
A2,A1,A0 ADDRESSES
REGISTER
READ/WRITE
COMMENTS
16C550 COMPATIBLE REGISTERS
0 00
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0 00
0 01
0 10
DLL - Div Latch Low Byte
DLM - Div Latch High Byte
AFR - Alternate Function Register
Read/Write
Read/Write
Read/Write
LCR[7] = 1
LCR ≠ 0xBF
0 00
0 01
DREV - Device Revision Code
DVID - Device Identification Code
Read-only
Read-only
DLL, DLM = 0x00
LCR[7] = 1
LCR ≠ 0xBF
0 01
0 10
IER - Interrupt Enable Register
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read/Write
Read-only
Write-only
LCR[7] = 0
0 11
LCR - Line Control Register
Read/Write
1 00
MCR - Modem Control Register
Read/Write
1 01
LSR - Line Status Register
Reserved
Read-only
Write-only
LCR[7] = 0
1 10
MSR - Modem Status Register
Reserved
Read-only
Write-only
1 11
SPR - Scratch Pad Register
Read/Write
LCR[7] = 0
FCTR[6] = 0
1 11
1 11
FLVL - TX/RX FIFO Level Counter Register
EMSR - Enhanced Mode Select Register
Read-only
Write-only
LCR[7] = 0
FCTR[6] = 1
ENHANCED REGISTERS
0 00
TRG - TX/RX FIFO Trigger Level Register
FC - TX/RX FIFO Level Counter Register
Write-only
Read-only
0 01
FCTR - Feature Control Reg
Read/Write
0 10
1 00
EFR - Enhanced Function Reg
Xon-1 - Xoff Character 1
Read/Write
Read/Write
LCR = 0xBF
1 01
Xon-2 - Xoff Character 2
Read/Write
1 10
Xoff-1 - Xon Character 1
Read/Write
1 11
Xoff-2 - Xon Character 2
Read/Write
21