XR16M598 Datasheet, PDF (26/58 Pages) Exar Corporation – 1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 16-BYTE FIFO

XR16M598
1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 16-BYTE FIFO
REV. 1.0.0
Each bit gives an indication of the channel that has requested for service. For example, bit-0 represents
channel 0 and bit-7 indicates channel 7. Logic one indicates the channel N [7:0] has called for service. The
interrupt bit clears after reading the appropriate register of the interrupting UART channel register (ISR, LSR
and MSR). SEE”INTERRUPT CLEARING:” ON PAGE 35. for interrupt clearing details.
3.1.1.1 INT0 Channel Interrupt Indicator
INT0 Register
Individual UART Channel Interrupt Status
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Ch-7 Ch-6 Ch-5 Ch-4 Ch-3 Ch-2 Ch-1 Ch-0
3.1.1.2 INT1, INT2 and INT3 Interrupt Source Locator
INT3, INT2 and INT1 provide a 24-bit (3 bits per channel) encoded interrupt indicator. Table 10 shows the 3 bit
encoding and their priority order. The 16-bit Timer time-out interrupt will show up only as a channel 0 interrupt.
For other channels, interrupt 7 is reserved.
.
FIGURE 13. THE GLOBAL INTERRUPT REGISTERS, INT0, INT1, INT2 AND INT3
Interrupt Registers,
INT0, INT1, INT2 and INT3
INT3 Register
INT2 Register
INT1 Register
Channel-7
Bit Bit Bit
21 0
Channel-6
Bit Bit Bit
21 0
Channel-5
Bit Bit Bit
21 0
Channel-4
Bit Bit Bit
21 0
Channel-3
Bit Bit Bit
21 0
Channel-2
Bit Bit Bit
21 0
Channel-1
Bit Bit Bit
21 0
Channel-0
Bit Bit Bit
21 0
INT0 Register
Ch-7 Ch-6 Ch-5 Ch-4 Ch-3 Ch-2 Ch-1 Ch-0
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
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