XR16L651 Datasheet, PDF (24/56 Pages) Exar Corporation – 2.25V TO 5.5V UART WITH 32-BYTE FIFO

XR16L651
2.25V TO 5.5V UART WITH 32-BYTE FIFO
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REV. 1.3.0
TABLE 8: UART CONFIGURATION REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1.
ADDRESS REG READ/
A2-A0 NAME WRITE
BIT-7
BIT-6
BIT-5
BIT-4 BIT-3 BIT-2 BIT-1 BIT-0
COMMENT
16C550 Compatible Registers
0 0 0 RHR RD Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0 0 0 THR WR Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
001
IER RD/WR 0/
0/
0/
0/ Modem RX Line TX
RX
CTS Int. RTS Int. Xoff Int.
Enable Enable Enable
Sleep
Mode
Enable
Stat. Stat. Empty Data
Int.
Int.
Int
Int.
Enable Enable Enable Enable
0 1 0 ISR RD FIFOs FIFOs
0/
0/
INT
INT
INT
INT
LCR[7] = 0
Enabled Enabled
Source Source Source Source
INT
INT _{Bit-3 Bit-2 Bit-1 Bit-0}
Source Source
Bit-5 Bit-4
010
FCR
WR RXFIFO RXFIFO 0/
0/
DMA TX
RX FIFOs
Trigger Trigger
Mode FIFO FIFO Enable
TXFIFO TXFIFO _{Enable Reset Reset}
Trigger Trigger
011
LCR
RD/WR Divisor
Enable
Set TX Set Par-
Break
ity
Even
Parity
Parity
Enable
Stop
Bits
Word Word
Length Length
Bit-1 Bit-0
100
MCR RD/WR
0/
BRG
Pres-
caler
0/
0/
IR Mode INT Type
ENable Select
Internal
Loop-
back
Enable
OP2#/
IRQn
Output
Enable
OP1#
RTS# DTR#
Output Output
Control Control
101
LSR
XFR
RD RX FIFO TSR
Error Empty
THR
Empty
RX
Break
RX
Fram-
ing
Error
RX
Parity
Error
RX
Data
Over-
run
Error
RX
Data
Ready
WR Rsrvd Rsrvd Invert Enable LSR Auto Invert Enable
RS485 XonAny INT RS485 IR RX Half-
Control
Mode Enable Input duplex
Output
IR
LCR[7]=0
1 1 0 MSR RD
CD
RI
DSR CTS Delta Delta Delta Delta
CD# RI# DSR# CTS#
111
IRPW WR
SPR RD/WR
Bit-7
Bit-7
Bit-6
Bit-6
Bit-5
Bit-5
Bit-4
Bit-4
Bit-3
Bit-3
Bit-2
Bit-2
Bit-1
Bit-1
Bit-0
Bit-0
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