XR17C154 Datasheet, PDF (16/62 Pages) Exar Corporation – 5V PCI BUS QUAD UART

XR17C154
5V PCI BUS QUAD UART
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REV. 1.3.0
1.2.6 SLEEP [31:24](default 0x00)
Each UART can be separately enabled to enter Sleep mode through the Sleep register. Sleep mode reduces
power consumption when the system needs to put the UART(s) to idle. All of these conditions must be satisfied
for the 154 to enter sleep mode:
• no interrupts pending (INT0 = 0x00)
• divisor is a non-zero value for all channels (ie. DLL = 0x1)
• sleep mode is enabled (SLEEP = 0x0F)
• modem inputs for all channels are not toggling (MSR bits 0-3 = 0)
• RX input pins for all channels are idling HIGH
The 154 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for no
clock output as an indication that the device has entered the sleep mode.
The 154 resumes normal operation by any of the following:
• a receive data start bit transition (HIGH to LOW)
• a data byte is loaded to the transmitter, THR or FIFO
• a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
If the 154 is awakened by any one of the above conditions, it will return to the sleep mode automatically after
all interrupting conditions have been serviced and cleared. If the 154 is awakened by the modem inputs, a read
to the MSR is required to reset the modem inputs. In any case, the sleep mode will not be entered while an in-
terrupt is pending from any channel. The 154 will stay in the sleep mode of operation until it is disabled by set-
ting Sleep = 0x00. In this case, the quad UART is awaken by any of the UART channel from a receive data
byte or a change on the serial port. The UART is ready after 32 crystal clocks to ensure full functionality. Also,
a special interrupt is generated with an indication of no pending interrupt. Reading INT0 will clear this special
interrupt. Logic 0 (default) is disable and logic 1 is enable to sleep mode.
SLEEP Register
Individual UART Channel Sleep Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Rsvd Rsvd Rsvd Rsvd Ch-3 Ch-2 Ch-1 Ch-0
1.2.7 Device Identification and Revision
There are two internal registers that provide device identification and revision, DVID and DREV registers. The
8-bit content in the DVID register provides device identification. A return value of 0x24 from this register
indicates the device is a XR17C154. The DREV register returns an 8-bit value of 0x01 for revision A with 0x02
equals to revision B and so forth. This information is very useful to the software driver for identifying which
device it is communicating with and to keep up with revision changes.
DVID [15:8]
Device identification for the type of UART. The upper nibble indicates it is a XR17Cxxx series with lower nibble
indicating the number of channels.
Examples:
XR17C158 or XR17D158 = 0x28
XR17C154 or XR17D154 = 0x24
XR17C152 or XR17D152 = 0x22
DREV [7:0]
Revision number of the XR17C154. A 0x01 represents "revision-A" with 0x02 for rev-B and so forth.
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