XR17C154 Datasheet, PDF (15/62 Pages) Exar Corporation – 5V PCI BUS QUAD UART

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REV. 1.3.0
XR17C154
5V PCI BUS QUAD UART
TIMERMSB [31:24] and TIMERLSB [23:16]
TIMERMSB and TIMERLSB form a 16-bit value. The least-significant bit of the timer is being bit [0] of the
TIMERLSB with most-significant-bit being bit [7] in TIMERMSB. Notice that these registers do not hold the
current counter value when read. Reading the TIMERCNTL register will clear its interrupt. Default value is zero
(timer disabled) upon powerup and reset.
16-Bit Tim er/Counter Program m able Registers
TIMERMSB Register
TIMERLSB Register
Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10 Bit-9 Bit-8
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
1.2.3 8XMODE [7:0] (default 0x00)
Each bit selects 8X or 16X sampling rate for that UART channel, bit-0 is channel 0. Logic 0 (default) selects
normal 16X sampling with logic one selects 8X sampling rate. Transmit and receive data rates will double by
selecting 8X.
8XMODE Register
Individual UART Channel 8X Clock Mode Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Rsvd Rsvd Rsvd Rsvd Ch-3 Ch-2 Ch-1 Ch-0
1.2.4 REGA [15:8] Reserved
1.2.5 RESET [23:16] (default 0x00)
Bits 0 to 3 of the Reset register [RESET] provides the software with the ability to reset the UART(s) when there
is a need. Each bit is self-resetting after it is written a logic 1 to perform a reset to that channel. All registers in
that channel will be reset to the default condition, see Table 19 for details. Bit-0 =1 resets UART channel 0 with
bit-3=1 resets channel 3
RESET Register
Individual UART Channel Reset Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Rsvd Rsvd Rsvd Rsvd Ch-3 Ch-2 Ch-1 Ch-0
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