XR68C92_05 Datasheet, PDF (15/33 Pages) Exar Corporation – DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER

XR68C92/192
INTERNAL REGISTER DESCRIPTIONS
A3 A2 A1 A0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
READ Operation
Mode Register A (MR0A, MR1A, MR2A)
Status Register A (SRA)
Reserved
Receiver Buffer A (RXA)
Input Port Change Register (IPCR)
Interrupt Status Register (ISR)
Counter/Timer Upper Register (CUR)
Counter/Timer Lower Register (CLR)
Mode Register B (MR0B, MR1B, MR2B)
Status Register B (SRB)
Reserved
Receiver Buffer B (RXB)
Interrupt Vector Register (IVR)
Input Port Register (IPR)
Start C/T Command (STCR)
Stop C/T Command (SPCR)
WRITE Operation
Mode Register A (MR0A, MR1A, MR2A)
Clock-Select Register A (CSRA)
Command Register A (CRA)
Transmitter Buffer A (TXA)
Auxiliary Control Register (ACR)
Interrupt Mask Register (IMR)
C/T Preload value Upper Register (CTPU)
C/T Preload value Lower Register (CTPL)
Mode Register B (MR0B, MR1B, MR2B)
Clock-Select Register B (CSRB)
Command Register B (CRB)
Transmitter Buffer B (TXB)
Interrupt Vector Register (IVR)
Output Port Configuration Register (OPCR)
Set Output Port Register (SOPR)
Reset Output Port Register (ROPR)
Rev. 1.33
15