XRK69772 Datasheet, PDF (10/12 Pages) Exar Corporation – 1:12 LVCMOS PLL CLOCK GENERATOR

XRK69772
PRELIMINARY
1:12 LVCMOS PLL CLOCK GENERATOR
FIGURE 10. CYCLE-TO-CYCLE JITTER
T_N
T_N+1
T_JIT(CC)= |T_N-T_N+1 |
The variation in cycle time of a signal between adjacent cycles, over a random
sample of adjacent cycle pairs
FIGURE 11. PERIOD JITTER
T₀
T_JIT(Per)= |T_N-1/f₀ |
The deviation in cycle time of a signal with respect to the ideal period over a random sample of cycles
FIGURE 12. OUTPUT TRANSITION TIME TEST REFERENCE
Ot_F
V_CC=3.3V
2.4
0.55
Ot_R
REV. P1.0.0
10