XR16V2752_07 Datasheet, PDF (1/51 Pages) Exar Corporation – HIGH PERFORMANCE DUART WITH 64-BYTE FIFO

XR16V2752
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
MAY 2007
REV. 1.0.1
GENERAL DESCRIPTION
The XR16V2752¹ (V2752) is a high performance dual
universal asynchronous receiver and transmitter
(UART) with 64 byte TX and RX FIFOs. The device
operates from 2.25 to 3.6 volts with 5 Volt tolerant
inputs and is pin-to-pin compatible to Exar’s
ST16C2552, XR16L2552 and XR16L2752. The
V2752 register set is identical to the XR16L2752 and
is compatible to the ST16C2552 and the XR16C2852
enhanced features. It supports the Exar’s enhanced
features of programmable FIFO trigger level and
FIFO level counters, automatic hardware (RTS/CTS)
and software flow control, automatic RS-485 half
duplex direction control output and a complete
modem interface. Onboard registers provide the user
with operational status and data error flags. An
internal loopback capability allows system
diagnostics. Independent programmable baud rate
generators are provided in each channel to select
data rates up to 8 Mbps at 3.3 Volt and 8X sampling
clock. The V2752 is available in 44-pin PLCC and 32-
pin QFN packages.
NOTE: 1 Covered by U.S. Patent #5,649,122
APPLICATIONS
• Portable Appliances
• Telecommunication Network Routers
• Ethernet Network Routers
• Cellular Data Devices
• Factory Automation and Process Controls
FEATURES
• 2.25 to 3.6 Volt Operation
• 5 Volt Tolerant Inputs
• Pin-to-pin compatible to Exar’s XR16L2752
• Two independent UART channels
■ Register set compatible to XR16L2752
■ Data rate of up to 8 Mbps at at 3.3 V, and
6.25 Mbps at 2.5 V with 8X sampling rate
■ Fractional Baud Rate Generator
■ Transmit and Receive FIFOs of 64 bytes
■ Programmable TX and RX FIFO Trigger Levels
■ Transmit and Receive FIFO Level Counters
■ Automatic Hardware (RTS/CTS) Flow Control
■ Selectable Auto RTS Flow Control Hysteresis
■ Automatic Software (Xon/Xoff) Flow Control
■ Automatic RS-485 Half-duplex Direction
Control Output via RTS#
■ Wireless Infrared (IrDA 1.0) Encoder/Decoder
■ Automatic sleep mode
■ Full modem interface
• Alternate Function Register
• Device Identification and Revision
• Crystal oscillator or external clock input
• Crystal oscillator (up to 32MHz) or external clock
(up to 64MHz) input
• 44-PLCC and 32-QFN packages
FIGURE 1. XR16V2752 BLOCK DIAGRAM
A2:A0
D7:D0
IOR#
IOW#
CS#
CHSEL
INTA
INTB
TXRDYA#
TXRDYB#
MFA#
(OP2A#,
BAUDOUTA#, or
RXRDYA#)
MFB#
(OP2B#,
BAUDOUTB#, or
RXRDYB#)
Reset
8-bit Data
Bus
Interface
*5 Volt Tolerant Inputs
(Except External Clock Input)
UART Channel A
UART
Regs
BRG
64 Byte TX FIFO
TX & RX ^IR
ENDEC
64 Byte RX FIFO
UART Channel B
(same as Channel A)
Crystal Osc/Buffer
Modem Control Logic
2.25 V to 3.6 V VCC
GND
TXA (or TXIRA)
RXA (or RXIRA)
TXB (or TXIRB)
RXB (or RXIRB)
XTAL1
XTAL2
CTS#A/B, RI#A/B,
CD#A/B, DSR#A/B
DTR#A/B, RTS#A/B
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • [phone] • FAX [phone] • www.exar.com