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M052LDN Datasheet, PDF (9/86 Pages) List of Unclassifed Manufacturers – 32-bit Microcontroller | |||
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M051 DN/DE
ï® Multiple clock sources
ï® Supports wake-up from Power-down or Sleep mode
ï® Interrupt or reset selectable on watchdog time-out
ï® Time-out reset delay period time can be selected
ï¬ WWDT (Window Watchdog Timer)
ï® 6-bit down counter with 11-bit pre-scale for wide range window selected
ï¬ PWM
ï® Up to four built-in 16-bit PWM generators, providing eight PWM outputs or four
complementary paired PWM outputs
ï® Individual clock source, clock divider, 8-bit pre-scalar and dead-zone generator for
each PWM generator
ï® PWM interrupt synchronized to PWM period
ï® 16-bit digital Capture timers with rising/falling capture inputs
ï® Supports capture interrupt
ï® Internal 10 kHz to PWM clock source
ï® Polar inverse function
ï® Center-aligned type function
ï® Timer duty interrupt enable function
ï® Two kinds of PWM interrupt period/duty type selection
ï® Period/duty trigger ADC function
ï® PWM Timer synchronous start function
ï¬ UART
ï® Up to two sets of UART devices
ï® Programmable baud-rate generator
ï® Buffered receiver and transmitter, each with 15 bytes FIFO
ï® Optional flow control function (CTS and RTS)
ï® Supports IrDA(SIR) function
ï® Supports RS485 function
ï® Supports LIN function
ï¬ SPI
ï® Up to two sets of SPI devices
ï® Supports Master/Slave mode
ï® Full-duplex synchronous serial data transfer
ï® Provides 3 wire function
ï® Variable length of transfer data from 1 to 32 bits
ï® MSB or LSB first data transfer
ï® Rx latching data can be either at rising edge or at falling edge of serial clock
ï® Tx sending data can be either at rising edge or at falling edge of serial clock
ï® Supports Byte Suspend mode in 32-bit transmission
ï® PLL clock source
ï® 4-level depth FIFO buffer for better performance and flexibility in SPI Burst Transfer
mode
Oct. 05, 2015
Page 9 of 86
Rev 1.03
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