M052LDN Datasheet, PDF (34/86 Pages) List of Unclassifed Manufacturers – 32-bit Microcontroller

M051 DN/DE
6.3 Clock Controller
6.3.1 Overview
The clock controller generates clocks for the whole chip, including system clocks and all
peripheral clocks. The clock controller also implements the power control function with the
individually clock ON/OFF control, clock source selection and clock divider. The chip enters
Power-down mode when Cortex^® -M0 core executes the WFI instruction only if the
PWR_DOWN_EN (PWRCON[7]) bit and PD_WAIT_CPU (PWRCON[8]) bit are both set to 1.
After that, chip enters Power-down mode and waits for wake-up interrupt source triggered to exit
Power-down mode. In Power-down mode, the clock controller turns off the 4~24 MHz external
high speed crystal (HXT) and 22.1184 MHz internal high speed RC oscillator (HIRC) to reduce
the overall system power consumption. The following figures show the clock generator and the
overview of the clock source control.
The clock generator consists of 4 clock sources as listed below:
 4~24 MHz external high speed crystal oscillator (HXT)
 Programmable PLL output clock frequency (PLL source can be selected from external
4~24 MHz external high speed crystal (HXT) or 22.1184 MHz internal high speed
oscillator (HIRC)) (PLL FOUT)
 22.1184 MHz internal high speed RC oscillator (HIRC)
 10 kHz internal low speed RC oscillator (LIRC)
XTAL1
XTAL2
XTL12M_EN (PWRCON[0])
4~24 MHz HXT
OSC22M_EN (PWRCON[2])
22.1184 MHz
HIRC
OSC10K_EN(PWRCON[3])
PLL_SRC (PLLCON[19])
0
PLL
1
HXT
PLL FOUT
HIRC
10 kHz
LIRC
LIRC
Legend:
HXT = 4~24 MHz external high speed crystal oscillator
HIRC = 22.1184 MHz internal high speed RC oscillator
LIRC = 10 kHz internal low speed RC oscillator
Note: Before clock switching, both the pre-selected and newly selected clock sources must be
turned on and stable.
Figure 6-3 Clock Generator Block Diagram
Oct. 05, 2015
Page 34 of 86
Rev 1.03