M052LDN Datasheet, PDF (42/86 Pages) List of Unclassifed Manufacturers – 32-bit Microcontroller

M051 DN/DE
6.6 General Purpose I/O (GPIO)
6.6.1 Overview
The NuMicro^® M05xxDN/DE has up to 40 General Purpose I/O pins to be shared with other
function pins depending on the chip configuration. These 40 pins are arranged in 5 ports named
as P0, P1, P2, P3 and P4. Each port has the maximum of 8 pins. Each of the 40 pins is
independent and has the corresponding register bits to control the pin mode function and data.
The I/O type of each pin can be configured by software individually as Input, Push-pull output,
Open-drain output or Quasi-bidirectional mode. After the chip is reset, the I/O mode of all pins is
stay in quasi-bidirectional mode and each port data register Px_DOUT[7:0] resets to 0x000_00FF.
Each I/O pin has a very weakly individual pull-up resistor which is about 110 k ~ 300 k for V_DD
which is from 5.0 V to 2.5 V.
6.6.2 Features
 Four I/O modes:
 Input only with high impedance
 Push-pull output
 Open-drain output
 Quasi-bidirectional TTL/Schmitt trigger input mode selected by Px_MFP[23:16]
 I/O pin configured as interrupt source with edge/level setting
 I/O pin internal pull-up resistor enabled only in Quasi-bidirectional I/O mode
 Enabling the pin interrupt function will also enable the pin wake-up function
 Configurable default I/O mode of all pins after reset by CIOINI(CONFIG[10]) setting
 CIOINI = 0, all GPIO pins in Input tri-state mode after chip reset
 CIOINI = 1, all GPIO pins in Quasi-bidirectional mode after chip reset
Oct. 05, 2015
Page 42 of 86
Rev 1.03