NUC920ABN Datasheet, PDF (84/529 Pages) Nuvoton Technology Corporation – 32-BIT ARM926EJ-S BASED MCU

NUC920ABN
[15]
ADRS
[14:11] tACC
[10:8] tCOH
[7:5]
tACS
32-BIT ARM926EJ-S BASED MCU
Address Bus Alignment for External I/O Bank 0~4
When ADRS is set, EBI bus is alignment to byte address format, and ignores
DBWD [1:0] setting.
Access Cycles （nOE or nSWE active time）for External I/O Bank 0~4
tACC[14:11]
MCLK
tACC[14:11]
MCLK
0
0
0
0
Reversed
1
0
0
0
9
0
0
0
1
1
1
0
0
1
11
0
0
1
0
2
1
0
1
0
13
0
0
1
1
3
1
0
1
1
15
0
1
0
0
4
1
1
0
0
17
0
1
0
1
5
1
1
0
1
19
0
1
1
0
6
1
1
1
0
21
0
1
1
1
7
1
1
1
1
23
Chip Selection Hold-On Time on nOE or nWBE for External I/O Bank 0~4
tCOH [10:8]
MCLK
0
0
0
0
0
0
1
1
0
1
0
2
0
1
1
3
1
0
0
4
1
0
1
5
1
1
0
6
1
1
1
7
Address Set-up Before nECS for External I/O bank 0~4
tACS [7:5]
MCLK
0
0
0
0
0
0
1
1
0
1
0
2
0
1
1
3
1
0
0
4
1
0
1
5
1
1
0
6
1
1
1
7
Publication Release Date: Jun. 18, 2010
84
Revision: A3