NUC920ABN Datasheet, PDF (39/529 Pages) Nuvoton Technology Corporation – 32-BIT ARM926EJ-S BASED MCU

NUC920ABN
[7:6]
[8]
[9]
[10]
[11]
[12]
Booting
Device
Select
RESERVED
USBHD
USBDEN
RESERVED
PCI66EN
32-BIT ARM926EJ-S BASED MCU
Booting Device Select (Read Only)
these two bits are power-on reset from MA[21:20]
Booting Device Select
[7:6]
Booting Device
0
0
SPI Flash ROM
0
1
Reserved
1
0
USB ISP
1
1
NOR-type Flash ROM
Read Only
This bit is read only
USB PHY0 Mode Select (Read/Write)
This bit is power-on reset from HDS
USBHD
USB PHY0 Mode
0
USB20 Device
1
USB20 Host
HDS Pin
External Pull-Up
External Pull-Down
USB PHY0 Enable Control for USB Device Mode (Read/Write)
This bit is only active when the USBHD bit be zero (Device Mode)
USBDEN
USB PHY0 Enable
0
Set Device PHY at SE0 (Not active to external host)
1
Set Device PHY controlled by the UTMI interface of the USB
Device Controller
Read Only
This bit is read only
PCI 66MHz Enable Status
PCI66EN
Status
0
Indicates PCI bus can operate under 33MHz
1
Indicates PCI bus can operate under 66MHz
Publication Release Date: Jun. 18, 2010
39
Revision: A3