RFM92 Datasheet, PDF (65/126 Pages) List of Unclassifed Manufacturers – Low Power Long Range Transceiver Module

RFM92W/93W V3.0
4.2.12. Digital IO Pins Mapping
Six general purpose IO pins are available on the RFM92W/93W and their configuration in Continuous or Packet
mode is controlled through RegDioMapping1 and RegDioMapping2.
Table 28 DIO Mapping, Continuous Mode
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
DIOx Mapping
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
Sleep
-
-
-
-
ClkOut if RC
-
-
Standby
FSRx/Tx
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TempChange / LowBat
-
ModeReady
ClkOut
-
ModeReady
Rx
SyncAddress
Rssi / PreambleDetect
RxReady
Dclk
Rssi / PreambleDetect
Tx
TxReady
-
TxReady
-
Data
Data
Data
Data
Timeout
-
Rssi / PreambleDetect
-
TempChange / LowBat
TempChange / LowBat
PllLock
TimeOut
-
ModeReady
ClkOut
PllLock
Rssi / PreambleDetect
-
ModeReady
Table 29 DIO Mapping, Packet Mode
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
DIOx Mapping
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
Sleep
Standby
FSRx/Tx
-
-
-
-
TempChange / LowBat
FifoLevel
FifoEmpty
FifoFull
FifoLevel
FifoEmpty
FifoFull
-
FifoFull
-
FifoFull
FifoFull
FifoFull
FifoEmpty
FifoEmpty
FifoEmpty
FifoEmpty
-
FifoEmpty
FifoEmpty
-
TempChange / LowBat
-
-
-
ClkOut if RC
-
-
ClkOut
-
ModeReady
Rx
PayloadReady
CrcOk
Tx
PacketSent
-
TempChange / LowBat
FifoLevel
FifoEmpty
FifoFull
FifoFull
RxReady
-
TimeOut
FifoFull
SyncAddress
FifoFull
FifoEmpty
TxReady
FifoEmpty
FifoEmpty
TempChange / LowBat
PllLock
TimeOut
-
Rssi / PreambleDetect
-
PllLock
ClkOut
Data
ModeReady
Page 65
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