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RFM92 Datasheet, PDF (104/126 Pages) List of Unclassifed Manufacturers – Low Power Long Range Transceiver Module
RFM92W/93W V3.0
Name
(Address)
Bits
7-6
RegDioMapping1 5-4
(0x40)
3-2
1-0
7-6
5-4
RegDioMapping2 3-1
(0x41)
0
RegVersion
(0x42)
7-0
7-6
RegAgcRef
(0x43)
5-0
RegAgcThresh1 7-5
(0x44)
4-0
RegAgcThresh2 7-4
(0x45)
3-0
RegAgcThresh3 7-4
(0x46)
3-0
RegPllHop
7
(0x4b)
6-0
7-5
RegTcxo
(0x58)
4
3-0
7-3
RegPaDac
(0x5A)
2-0
Variable Name
Dio0Mapping
Dio1Mapping
Dio2Mapping
Dio3Mapping
Dio4Mapping
Dio5Mapping
reserved
MapPreambleDetect
Version
unused
AgcReferenceLevel
unused
AgcStep1
AgcStep2
AgcStep3
AgcStep4
AgcStep5
FastHopOn
reserved
reserved
TcxoInputOn
reserved
reserved
PaDac
Mode
Default
value
FSK/OOK Description
rw 0x00
rw 0x00
Mapping of pins DIO0 to DIO5
rw 0x00
rw 0x00 See Table 23 for mapping in LoRa mode
rw 0x00 See Table 27 for mapping in Continuous mode
rw 0x00 See table 28 for mapping in Packet mode
rw 0x00 reserved. Retain default value
Allows the mapping of either Rssi Or PreambleDetect to the DIO
rw
0x00
pins, as summarized on Table 27 and Table 28
0 Æ Rssi interrupt
1 Æ PreambleDetect interrupt
Version register
r
0x22
Version code of the chip. Bits 7-4 give the full revision number;
bits 3-0 give the metal mask revision number.
Additional registers
r
- unused
Sets the floor reference for all AGC thresholds:
rw
0x13
AGC Reference [dBm] =
-174 dBm + 10*log(2*RxBw) + SNR + AgcReferenceLevel
SNR = 8 dB, fixed value
r
- unused
rw 0x0E Defines the 1st AGC Threshold
rw 0x05 Defines the 2nd AGC Threshold:
rw 0x0B Defines the 3rd AGC Threshold:
rw 0x0D Defines the 4th AGC Threshold:
rw 0x0B Defines the 5th AGC Threshold:
Bypasses the main state machine for a quick frequency hop.
rw
0x00
Writing RegFrfLsb will trigger the frequency change.
0 Æ Frf is validated when FSTx or FSRx is requested
1 Æ Frf is validated triggered when RegFrfLsb is written
rw 0x2E reserved
rw 0x00 reserved. Retain default value
Controls the crystal oscillator
rw 0x00 0 Æ Crystal Oscillator with external Crystal
1 Æ External clipped sine TCXO AC-connected to XTA pin
rw 0x09 Reserved. Retain default value.
rw 0x10 reserved. Retain default value
Enables the +20 dBm option on PA_BOOST pin
rw 0x04 0x04 Æ Default value
0x07 Æ +20 dBm on PA_BOOST when OutputPower = 1111
Page 104
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