RFM92 Datasheet, PDF (6/126 Pages) List of Unclassifed Manufacturers – Low Power Long Range Transceiver Module

RFM92W/93W V3.0
Table of contents
Section
Page
Table 1. RFM92W/93W Device Variants and Key Parameters ......................................................................................11
Table 2. Pin Description ................................................................................................................................................12
Table 3. Absolute Maximum Ratings .............................................................................................................................14
Table 4. Operating Range .............................................................................................................................................14
Table 5. Operating Range .............................................................................................................................................14
Table 6. Power Consumption Specification ...................................................................................................................15
Table 7. Frequency Synthesizer Specification ..............................................................................................................15
Table 8. Receiver Specification .....................................................................................................................................16
Table 9. Transmitter Specification .................................................................................................................................17
Table 10. Digital Specification .......................................................................................................................................20
Table 11. Example LoRa^TM Modem Performances ......................................................................................................23
Table 12. Range of Spreading Factors ..........................................................................................................................25
Table 13. Cyclic Coding Overhead ................................................................................................................................25
Table 14. LoRa^TM Operating Mode Functionality ..........................................................................................................33
Table 15. LoRa CAD Consumption Figures ..................................................................................................................42
Table 16. DIO Mapping LoRa^TM Mode ..........................................................................................................................42
Table 17. Bit Rate Examples .........................................................................................................................................43
Table 18. Preamble Detector Settings ...........................................................................................................................49
Table 19. RxTrigger Settings to Enable Timeout Interrupts ..........................................................................................50
Table 20. Basic Transceiver Modes ..............................................................................................................................50
Table 21. Receiver Startup Time Summary ..................................................................................................................52
Table 22. Receiver Startup Options ..............................................................................................................................55
Table 23. Sequencer States ..........................................................................................................................................56
Table 24. Sequencer Transition Options .......................................................................................................................57
Table 25. Sequencer Timer Settings .............................................................................................................................59
Table 26. Status of FIFO when Switching Between Different Modes of the Chip .........................................................63
Table 27. DIO Mapping, Continuous Mode ...................................................................................................................65
Table 28. DIO Mapping, Packet Mode ..........................................................................................................................65
Table 29. CRC Description ...........................................................................................................................................73
Table 30. Power Amplifier Mode Selection Truth Table ................................................................................................82
Table 31. High Power Settings ......................................................................................................................................83
Table 32. Operating Range, +20 dBm Operation ..........................................................................................................83
Table 33. Operating Range, +20 dBm Operation ..........................................................................................................83
Table 34. Trimming of the OCP Current ........................................................................................................................84
Table 35. LNA Gain Control and Performances ............................................................................................................85
Table 36. RssiSmoothing Options .................................................................................................................................87
Table 37. Available RxBw Settings ................................................................................................................................87
Table 38. Registers Summary .......................................................................................................................................89
Table 39. Register Map .................................................................................................................................................92
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