RF65 Datasheet, PDF (6/72 Pages) List of Unclassifed Manufacturers – Low Power Integrated UHF Receiver With -120dBm High Sensitivity

ADVANCED COMMUNICATIONS & SENSING
RF65
DATASHEET
Figure 40. Exiting Listen Mode in RF65 V2a ............................................................................................................... 70
Figure 41. RegTestOok Description ............................................................................................................................ 70
Index of Tables
Page
Table 1. RF65 Pinouts .................................................................................................................................................. 10
Table 2. Absolute Maximum Ratings ............................................................................................................................ 11
Table 3. Operating Range ............................................................................................................................................ 11
Table 4. Power Consumption Specification .................................................................................................................. 12
Table 5. Frequency Synthesizer Specification .............................................................................................................. 12
Table 6. Receiver Specification .................................................................................................................................... 13
Table 7. Digital Specification ........................................................................................................................................ 14
Table 8. LNA Gain Settings .......................................................................................................................................... 18
Table 9. Receiver Performance Summary .................................................................................................................... 19
Table 10. Available RxBw Settings ............................................................................................................................... 21
Table 11. Bit Rate Examples ........................................................................................................................................ 23
Table 12. Basic Receiver Modes .................................................................................................................................. 30
Table 13. Range of Durations in Listen Mode .............................................................................................................. 33
Table 14. Signal Acceptance Criteria in Listen Mode ................................................................................................... 34
Table 15. End of Listen Cycle Actions .......................................................................................................................... 34
Table 16. Status of FIFO when Switching Between Different Modes of the Chip ......................................................... 40
Table 17. DIO Mapping, Continuous Mode .................................................................................................................. 42
Table 18. DIO Mapping, Packet Mode ......................................................................................................................... 42
Table 19. Registers Summary ...................................................................................................................................... 52
Table 20. Common Configuration Registers ................................................................................................................. 55
Table 21. Receiver Registers ....................................................................................................................................... 58
Table 22. IRQ and Pin Mapping Registers ................................................................................................................... 60
Table 23. Packet Engine Registers .............................................................................................................................. 62
Table 24. Temperature Sensor Registers ..................................................................................................................... 65
Table 25. Test Registers .............................................................................................................................................. 65
Table 26. Crystal Specification ..................................................................................................................................... 66
Table 27. Chip Identification ......................................................................................................................................... 70
Table 28. Revision History ............................................................................................................................................ 72
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