RFM66W Datasheet, PDF (50/87 Pages) List of Unclassifed Manufacturers – 868 & 915MHz Ultra Low Power High Link Budget Integrated UHF Transceiver

WIRELESS & SENSING
FifoLevel
1
RFM66W
DATASHEET
0
B B+1
# of bytes in FIFO
Figure 26. FifoLevel IRQ Source Behavior
Note
- FifoLevel interrupt is updated only after a read or write operation on the FIFO. Thus the interrupt cannot be
dynamically updated by only changing the FifoThreshold parameter
- FifoLevel interrupt is valid as long as FifoFull does not occur. An empty FIFO will restore its normal operation
5.2.2.4. FIFO Clearing
Table below summarizes the status of the FIFO when switching between different modes
Table 25 Status of FIFO when Switching Between Different Modes of the Chip
From
Stdby
Sleep
Stdby/Sleep
Stdby/Sleep
Rx
Rx
Tx
To
Sleep
Stdby
Tx
Rx
Tx
Stdby/Sleep
Any
FIFO status
Not cleared
Not cleared
Not cleared
Cleared
Cleared
Not cleared
Cleared
Comments
To allow the user to write the FIFO in Stdby/Sleep before Tx
To allow the user to read FIFO in Stdby/Sleep mode after Rx
5.2.3. Sync Word Recognition
5.2.3.1. Overview
Sync word recognition (also called Pattern recognition) is activated by setting SyncOn in RegSyncConfig. The bit
synchronizer must also be activated in Continuous mode (automatically done in Packet mode).
The block behaves like a shift register; it continuously compares the incoming data with its internally programmed Sync
word and sets SyncAddressMatch when a match is detected. This is illustrated in Figure 27 below.
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