GMS81504 Datasheet, PDF (37/54 Pages) List of Unclassifed Manufacturers – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

HYUNDAI MicroElectronics
GMS81504
IENH
MSB
INT0E INT1E -
LSB
-
T0E T1E
-
-
ADDRESS: F6H
RESET VALUE: 00--00--
IENL
MSB
LSB
AE
- BITE -
-
-
-
-
Enables or disables the interrupt individually.
If flag is cleared, the interrupt is disabled.
0: Disable
1: Enable
ADDRESS: F4H
RESET VALUE: 0-0-----
Figure 27. IENH, IENL: Interrupt Enable Registers
When an interrupt is responded to, the I-flag is cleared
to disable any further interrupt, the return address is
pushed into the stack and the PC is vectored to. Once
in the interrupt service routine the source(s) of the
interrupt can be determined by polling the interrupt
flag bits.
The interrupt flag bit(s) must be cleared in software
before reenabling interrupts to avoid recursive inter-
rupts. The Interrupt Request flags are able to be read
and write.
External Interrupt
External interrupt on INT0, INT1 pins are edge trig-
gered depending on the edge selection register IEDS.
The edge detection of external interrupt has three
transition activated mode: rising edge, falling edge,
both edge. INT0, INT1 are multiplexed with general
I/O ports (R40, R41). To use external interrupt pin, set
bit 0 to bit 3 of the port mode register PMR4.
The PMR4 and IEDS registers are shown in Figure
30.
INT0
EDGE DETECTOR
IEDS[1:0]
INT0IF
INT0 INTERRUPT
INT1
IEDS[3:2]
INT1IF
INT1 INTERRUPT
Figure 28. External Interrupt
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