GMS81504 Datasheet, PDF (17/54 Pages) List of Unclassifed Manufacturers – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

HYUNDAI MicroElectronics
GMS81504
MSB
LSB
PSW
N V G B H I Z C RESET VALUE: 00H
NEGATIVE FLAG
CARRY FLAG RECEIVES
CARRY OUT
OVERFLOW FLAG
ZERO FLAG
G FLAG TO SELECT DIRECT PAGE
(NOT AVAILABLE ON GMS81504)
BRK FLAG
INTERRUPT ENABLE
FLAG
HALF CARRY FLAG RECEIVES
CARRY OUT FROM BIT 1 OF
ADDITION OPERANDS
Figure 6. PSW (Program Status Word) Register
flag and the Carry bit.
[Carry flag C]
This flag stores any carry or borrow from the ALU of
CPU after an arithmetic operation and is also changed
by the Shift instruction or rotate instruction.
[Zero flag Z]
This flag is set when the result of an arithmetic opera-
tion or data transfer is "0" and is cleared by any other
result.
[Interrupt disable flag I] This flag enables/disables all
interrupts except interrupt caused by Reset or software
BRK instruction. All interrupts are disabled when
cleared to "0". This flag immediately becomes "0"
when an interrupt is served. It is set by the EI instruc-
tion, cleared by the DI instruction.
[Half carry flag H]
After operation, set when there is a carry from bit 3 of
ALU or there is not a borrow from bit 4 of ALU. This
bit can not be set or cleared except CLRV instruction,
clearing with Overflow flag (V).
[Break flag B]
This flag set by software BRK instruction to distin-
guish BRK from TCALL instruction which as the same
vector address.
[Direct page flag G]
This flag is not available on GMS81504 because this
flag is usable over 256 bytes RAM other than the
GMS81504, assign direct page for direct addressing
mode. In the direct addressing mode, addressing area
is within zero page 00H to FFH when this flag is "0".
If it is set to "1", addressing area is 100H to 1FFH.
It is set by SETG instruction, and cleared by CLRG.
[Overflow flag V]
This flag is set to "1" when an overflow occurs in the
result of an arithmetic operation involving signs. An
overflow occurs when the result of an addition or
subtraction exceeds +127(7FH) or -128(80H).
The CLRV instruction clears the overflow flag. There
is no set instruction. When the BIT instruction is
executed, for other than the above, bit 6 of memory is
copy to this flag.
[Negative flag N]
This flag is set to match the sign bit (bit 7) status of the
result of a data or arithmetic operation. When the BIT
instruction is executed, bit 7 of memory is copy to this
flag.
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