GMS81504 Datasheet, PDF (16/54 Pages) List of Unclassifed Manufacturers – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

GMS81504
HYUNDAI MicroElectronics
MEMORY ORGANIZATION
The GMS81504 has separate address spaces for Pro-
gram and Data Memory. Program memory can only be
read, not written to. It can be up to 4K bytes of Program
Memory. Data memory can be read and written to up
to 128 bytes including the stack area.
Registers
This device has six registers that are the Program
Counter (PC), a Accumulator (A), two Index registers
(X,Y), the Stack Pointer (SP) and the Program Status
Word (PSW). The Program Counter consists of 16-bit
register.
The index registers also have increment, decrement,
compare and data transfer functions and they can be
used as simple accumulators.
Stack Pointer: The stack pointer is an 8-bit register
used for occurrence interrupts and calling out subrou-
tines. The stack can be located at any position within
00H to 7FH of the internal data memory.
Caution:
The stack pointer must be initialized by software
because its value is undefined after reset.
Ex) LDX #07FH
TXSP
; SP ← 7FH
PCH
A
X
Y
SP
PCL
PSW
ACCUMULATOR
X REGISTER
Y REGISTER
STACK POINTER
PROGRAM COUNTER
PROGRAM STATUS
WORD
Figure 3. Configuration of Registers
Accumulator: The accumulator is the 8-bit general
purpose register, used for data operation such as trans-
fer, temporary saving and conditional judgment, etc.
The accumulator can be used as a 16-bit register with
Y register as shown below.
Y
Y
A
A
TWO 8-BIT REGISTERS ONE "YA" 16-BIT REGISTER
Figure 4. Configuration of YA 16-bit register
X register, Y register: In the addressing modes which
use these index registers, the register contents are
added to the specified address and this becomes the
actual address. These modes are extremely effective
for referencing subroutine tables and memory tables.
Stack Address (00H~7FH)
15
87
0
0
SP
Hardware fixed.
Figure 5. Stack Pointer
Caution:
To prevent overrapped between user RAM an sys-
tem stack area, user have to consider using RAM.
Reset Routine Example:
RESET:
CLR_LP:
ORG
LDX
LDA
STA
CMPX
BNE
LDX
TXSP
:
0F000H
#0
#0
{X}+
#80H
CLR_LP
#07FH
;RAM CLEAR
;INITIALIZE SP.
Program Counter: The program counter is a 16-bit
wide which consists of two 8-bit registers, PCH, PCL.
This counter indicates the address of the next instruc-
tion to be executed. In reset state, the program counter
has reset vector address (PCH: FFH, PCL: FEH). .
Program Status Word : The Program Status Word
(PSW) contains several status bits that reflect the cur-
rent state of the CPU. The PSW shown in Figure 6. It
contains the Negative flag, the Overflow flag, the
Direct page flag, the Break flag, the Half Carry (for
BCD operations), the Interrupt enable flag, the Zero
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