GMS81504 Datasheet, PDF (20/54 Pages) List of Unclassifed Manufacturers – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

GMS81504
HYUNDAI MicroElectronics
Data Memory
Figure 9 shows the internal Data Memory space avail-
able. Data Memory are divided into three groups, a
user RAM, control registers and Stack.
00H
DATA
MEMORY
(RAM)
7FH
80H
BFH
C0H
FFH
NOT USED
CONTROL
REGISTERS
128 BYTES
(INCLUDE STACK
AREA)
Figure 9. Data Memory
The stack pointer should be initialized within 00H to
7FH by software because of implemented area of
internal data memory.
The control registers are used by the CPU and Periph-
eral functions for controlling the desired operation of
the device.
Therefore these registers contain control and status
bits for the interrupt system, the timer/ counters, analog
to digital converters, I/O ports. The control registers
are in address C0H to FFH.
Note that unoccupied addresses may not be imple-
mented on the chip. Read accesses to these addresses
will in general return random data, and write accesses
will have an indeterminate effect.
More detail informations of each register are explained
in each peripheral sections.
Caution:
Write only registers can not be accessed by bit
manipulation instruction.
Address Symbol
C0H
C1H
C8H
C9H
CAH
CBH
CCH
CDH
D0H
D1H
D3H ²⁾
D3H ²⁾
E2H
E4H
E5H
E8H
E9H
ECH
F4H
F5H
F6H
F7H
F8H
R0
R0DD
R4
R4DD
R5
R5DD
R6
R6DD
PMR4
PMR5
BITR
CKCTLR
TM0
+ ^{Note 3}
+ ^{Note 3}
ADCM
ADR
BUR
IENL
IRQL
IENH
IRQH
IEDS
R/W
R/W
W ¹⁾
R/W
W ¹⁾
R/W
W ¹⁾
R/W
W ¹⁾
W ¹⁾
W ¹⁾
R
W ¹⁾
R/W
R/W
R/W
R/W ⁴⁾
R
W ¹⁾
R/W
R/W
R/W
R/W
W ¹⁾
Power-on
Reset Value
MSB LSB
X
00000000
X
00000000
X
000-----
X
0000----
-0-0--00
--0-----
00000000
---10111
00000000
X
X
--000001
X
X
0-0-----
0-0-----
00--00--
00--00--
00000000
Legend - = Unimplemented locations.
X= Undefined value.
NOTES:
1) The all write only registers can not be accessed by bit
manipulation instruction.
2) The register BITR and CKCTLR are located at same address.
Address D3H is read as BITR, as written to CKCTLR.
3) Several names are given at same address. Refer to below
table.
Address
E4H
E5H
When read
Timer mode
Capture Mode
T0
CDR0
T1
CDR1
4) Only bit 0 of ADCM can be read.
When write
TDR0
TDR1
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