KXCJK-1013 Datasheet, PDF (25/31 Pages) List of Unclassifed Manufacturers – Accelerometer Specifications

± 2g / 4g / 8g Tri-axis Digital
Accelerometer Specifications
PART NUMBER:
KXCJK-1013
Rev. 2
Dec-2012
CTRL_REG2
Read/write control register that provides more feature set control. Note that to properly change the
value of this register, the PC1 bit in CTRL_REG1 must first be set to “0”.
R/W
SRST
Bit7
R/W
reserved
Bit6
R/W
reserved
Bit5
R/W
DCST
Bit4
R/W
reserved
Bit3
R/W
R/W
R/W
OWUFA OWUFB OWUFC
Bit2
Bit1
Bit0
I²C Address: 0x1Dh
Reset Value
00000000
SRST initiates software reset, which performs the RAM reboot routine. This bit will remain 1
until the RAM reboot routine is finished.
SRST = 0 – no action
SRST = 1 – start RAM reboot routine
DCST initiates the digital communication self-test function.
DCST = 0 – no action
DCST = 1 – sets ST_RESP register to 0xAAh and when ST_RESP is read, sets this
bit to 0 and sets ST_RESP to 0x55h
OWUFA, OWUFB, OWUFC sets the Output Data Rate for the Wake Up function (motion
detection) per Table 14 below
Wake Up function
OWUFA OWUFB OWUFC Output Data Rate
0
0
0
0.781Hz
0
0
1
1.563Hz
0
1
0
3.125Hz
0
1
1
6.25Hz
1
0
0
12.5Hz
1
0
1
25Hz
1
1
0
50Hz
1
1
1
100Hz
Table 14. Output Data Rate for Wake Up Function
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