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RFM24W Datasheet, PDF (24/34 Pages) List of Unclassifed Manufacturers – ISM Transceiver module
RFM24W
5. Internal Functional Blocks
The following sections provide an overview to the key internal blocks and features.
5.1. RX Chain
The internal low-noise amplifier (LNA) is designed to be a wide-band LNA that can be matched with three external
discrete components to cover any common range of frequencies in the sub-GHz band. The LNA has extremely low
noise to suppress the noise of the following stages to achieve optimal sensitivity so no external gain or front-end
modules are necessary. The LNA has gain control which is controlled by the internal automatic gain control (AGC)
algorithm. The LNA is followed by an I-Q mixer, filter, programmable gain amplifier (PGA), and ADC. The I-Q
mixers downconvert the signal to an intermediate frequency. The PGA then boosts the gain to be within dynamic
range of the ADC. The ADC rejects out of band blockers and converts the signal to the digital domain where
filtering, demodulation, and processing is performed. Peak detectors are integrated at the output of the LNA and
PGA for use in the AGC algorithm.
5.2. RX Modem
Using high-performance ADCs allows channel filtering, image rejection, and demodulation to be performed in the
digital domain which allows for large amounts of flexibility to optimize the device for a particular application. The
digital modem performs the following functions:
Channel selection filter
TX modulation
RX demodulation
Automatic Gain Control (AGC)
Preamble detection
Invalid preamble detection
Radio signal strength indicator (RSSI)
Automatic frequency compensation (AFC)
Packet handling including EZMAC® features
Cyclic redundancy check (CRC)
The digital channel filter and demodulator are optimized for ultra low power consumption and are highly
configurable. Supported modulation types are GFSK, FSK, 4GFSK, 4FSK, ASK, and OOK. The channel filter can be
configured to support bandwidths ranging from 850 down to 1.1 kHz. A large variety of data rates are supported ranging
from 0.123 up to 1 Mbps. The configurable preamble detector is used to improve the reliability of the sync-word detection.
The sync-word detector is only enabled when a valid preamble is detected, significantly reducing the probability of false
detection. The received signal strength indicator (RSSI) provides a measure of the signal strength received on the tuned
channel. The resolution of the RSSI is 0.5 dB. This high resolution RSSI enables accurate channel power measurements
for clear channel assessment (CCA), carrier sense (CS), and listen before talk (LBT) functionality. The extensive
programmability of the packet header allows for advanced packet filtering which in turn enables a mix of broadcast, group,
and point-to-point communication. A wireless communication channel can be corrupted by noise and interference, and it is
therefore important to know if the received data is free of errors. A cyclic redundancy check (CRC) is used to detect the
presence of erroneous bits in each packet. A CRC is computed and appended at the end of each transmitted packet and
verified by the receiver to confirm that no errors have occurred. The packet handler and CRC can significantly reduce the
load on the system microcontroller allowing for a simpler and cheaper microcontroller. The digital modem includes the
TX modulator which converts the TX data bits into the corresponding stream of digital modulation values to be summed
with the fractional input to the sigma-delta modulator. This modulation approach results in highly accurate resolution of
the frequency deviation. A Gaussian filter is implemented to support GFSK and 4GFSK, considerably reducing the energy
in the adjacent channels. The default bandwidth-time product (BT) is 0.5 for all programmed data rates, but it may be
adjusted to other values.
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