EMP202 Datasheet, PDF (18/28 Pages) List of Unclassifed Manufacturers – Single-Chip Dual-Channel AC’97 Audio Codec for PC Audio Systems

Single-Chip Dual-Channel AC’97 Audio Codec
EMP202
EMPIA Technology
Bit
15
14
13:12
11
10:4
3
2
1
0
5.1.22. MX3A S/PDIF Output Channel Status and Control
Default: 2000H
Type
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R
Function
Validity Control: (control V bit in Sub-Frame).
0: The V bit (valid flag) in sub-frame depends on whether or not the S/PDIF data is
under-run.
1: The V bit in sub-frame is always sent as 1 to indicate the invalid data is not suitable
for the receiver.
Double Rate S/PDIF: (DRS) This bit is always 0.
S/PDIF Sample Rate: (SPSR[1:0]).
00: Sample rate set to 44.1KHz, Fs[0:3]=0000.
01: Reserved.
10: Sample rate set to 48.0KHz, Fs[0:3]=0100 (default).
11: Sample rate set to 32.0KHz, Fs[0:3]=1100.
Generation Level: (LEVEL)
Category Code: (CC[6:0])
Preemphasis: (PRE).
0: None
1: Filter preemphasis is 50/15 µsec
Copyright: (COPY).
0: Asserted
1: Not asserted
Non-Audio Data Type: (/AUDIO).
0: PCM data
1: AC3 or other digital non-audio data.
Professional or Consumer Format: (PRO).
0: Consumer format
1: Professional format.
1) To ensure the control and status information started up correctly at the beginning of S/PDIF transmission,
MX3A.[14:0] should only be written to when S/PDIF transmitter is disabled (MX2A.2=0).
2) If validity control is set (MX3A.15=1), those data bits (bit 8 ~ bit 27) should be forced to 0 to obtain better
compatibility with mini disc devices.
5.2. GPIO Registers
Bit
15:9
8
7:1
0
5.2.1.MX3E Extended Modem Status and Control
Default: 0100H
Type
-
R/W
R
R
Function
Reserved
PRA
0 GPIO powered up/enabled
1 GPIO powered down/disabled
Reserved
GPIO
0 GPIO not ready (powered down)
1 GPIO Ready (powered up)
7/15/2002
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