HMS87C1808B Datasheet, PDF (82/99 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

HMS87C1X04B/08B/16B
21.2 Oscillation Fail Processor
The oscillation fail processor (OFP) can change the clock source
from external to internal oscillator when the osicllation fail oc-
cured. This function could be enabled or disabled by the bit[3] of
Configuration Memory (707Fh).
And this function can recover the external clock source when the
external clock is recovered to normal state.
Xin_opt Option
The X_IN_opt is the function to control the amount of noise to be
cancelled which entered into noise canceller in ONP, according
to external oscillator frequency. If the amount of noise to be can-
celled is selected to 40nS by X_IN_opt, the noise canceller in ONP
cancels the clock over 12.5MHz as a noise. And if the amount of
noise to be cancelled is selected to 80nS by X_IN_opt, the noise
canceller in ONP cancels the clock over 6.25MHz as a noise.
IN_CLK Option
The IN_CLK Option is the function to operate the device by us-
ing the internal oscillator clock in ONP block as system clock.
There is no need to connect the x-tal, resonator, RC and R exter-
naly. The user only to connect the X_IN pin to V_DD. This function
could be selected by the bit[4] of Configuration Memory
(707Fh). The characteristics of internal oscillator clock has the
period of 250ns±5% at V_DD=5V and 250ns±10% at whole oper-
ating voltage. After selecting the IN_CLK Option, the period of
internal oscillator clock could be checked by X_OUT outputting
clock divided the internal oscillator clock by 4.
21.3 Device Configuration Area
The Program Memory is consisted of configuration memory and
user program memory. The configration memory is used to set
the environment of system. The device configuration area can be
programmed or left unprogrammed to select device configuration
such as oscillation noise protector, internal 4MHz, amount of
noise to be cancelled,security, RC-oscillation select bits. This
area is not accessible during normal execution but is readable and
writable during program / verify.
CONFIG AFR1
AFR0 ONPb IN_CLK LF_on Xin_opt
Lock
ADDRESS
RC_osc 707F_H
Figure 21-2 Device Configuration Area
CONFIG
Option
AFR1,0
ONPb
IN_CLK
LF_on
Xin_opt
Lock
RC_osc
Bit Data
Operation
Remark
01 or 10 Address Fail RESET Disable
00 or 11 Address Fail RESET Enable
RESET the system when illegal
address generated
0 OSC Noise Protector Enable
1 OSC Noise Protector Disable
OSC Noise Protector(ONP)
Operation En/Disable Bit
0
Use the Inter 4MHz clock as the Device Osc Disable _{Using the internal 4MHz clock}
1
Use the Inter 4MHz clock as the Device Osc Enable ^{without external clock}
0 ONP Low Pass Filter (clock changer) Disable
1 ONP Low Pass Filter (clock changer) Enable
Change the Inter clock when
oscillation failed
0 40nS noise cancel (Xin : 8MHz)
1 80nS noise cancel (Xin : 4MHz)
To select the amount of noise of
to be cancelled in ONP OSC.
0 EPROM Data Read/Pgm Enable
1 EPROM Data Read/Pgm Disable
Unlock or lock EPROM data
0 X-tal or Ceramic Oscillation
1 External RC/ R Oscillation
Select oscillation source
Table 21-1 Explanation of configration bits
78
SEP. 2004 Ver 1.03