HMS87C1808B Datasheet, PDF (52/99 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

HMS87C1X04B/08B/16B
the number of timer overflow occurrence.
Timer/Counter still does the above, but with the added feature
that a edge transition at external input INTx pin causes the current
value in the Timer x register (T0,T1), to be captured into registers
CDRx (CDR0, CDR1), respectively. After captured, Timer x reg-
ister is cleared and restarts by hardware.
It has three transition modes: “falling edge”, “rising edge”, “both
edge” which are selected by interrupt edge selection register
IEDS (Refer to External interrupt section). In addition, the transi-
tion at INTx pin generate an interrupt.
Note: The CDRx, TDRx and Tx are in same address. In
the capture mode, reading operation read the CDRx, not Tx
because the reading path is opened to the CDRx, and
TDRx is read while writing operation executed.
TM0
TM1
EC0
fxin
INT0
INT1
-
-
CAP0 T0CK2 T0CK1 T0CK0 T0CN T0ST
-
-
1
X
X
X
X
X
POL
16BIT PWME CAP1 T1CK1 T1CK0 T1CN
T1ST
ADDRESS : D0H
RESET VALUE : --00_0000
ADDRESS : D2H
RESET VALUE : 0000_0000
X
0
0
1
X
X
X
X
Edge Detector
T0CK[2:0]
T0ST
0 : Stop
1 : Clear and Start
÷2
÷4
÷8
÷ 32
÷ 128
÷ 512
÷ 2048
÷1
÷2
÷8
MUX
1
CLEAR
T0 (8-bit)
T0CN
CAPTURE
CDR0 (8-bit)
T0IF
COMPARATOR
TDR0 (8-bit)
TIMER 0
INTERRUPT
MUX
IEDS[1:0]
1
INT0IF
T0ST
0 : Stop
1 : Clear and Start
T1 (8-bit)
CLEAR
INT 0
INTERRUPT
T1CK[1:0]
T1CN
IEDS[3:2]
CAPTURE
CDR1 (8-bit)
T1IF
COMPARATOR
TDR1 (8-bit)
TIMER 1
INTERRUPT
INT1IF
INT 1
INTERRUPT
Figure 12-6 8-bit Capture Mode
48
SEP. 2004 Ver 1.03