TC5299J Datasheet, PDF (15/32 Pages) List of Unclassifed Manufacturers – FAST ETHERNET PCMCIA LAN CONTROLLER

TC5299J
Programming Register (R/W)
The Controller enable software (driver) programming EEPROM or testing interrupt signal through this register directly.
It is located at core register Page3 base+02H.
7
6
5
4
3
2
1
0
EESEL FIRQ XX READ CS
SK
DI
DO(r) ATTRDIS
Name
EESEL,
CS,
SK,
DI,
DO
FIRQ
READ
ATTRDIS
Description
The software can read or programming serial EEPROM directly through accesses these bits.
EESEL should be set high before starting the EEPROM read/write.
This chip interrupt signal IRQ will be asserted when this bit is set high.
TC5299J can reload CFGA, CFGB and internal PROM, if this bit is set high. When reload
state is completed, READ will be cleared to low.
Attribute and common memory access will be disable if it is programmed to high.
NOTE:
DO: read only
ATTRDIS: write only
5.5 MII/PHY Control Register
The controller can access PHYTER register via software driver. It is located at core register Page3 base+03H.
Name
MDC
MDO
MDIR
MDI
FE
XX
7
6
5
XX
FE
XX
4
3
2
1
0
XX
MDI MDIR MDO
MDC
R/W Description
W MII Management Clock
W MII Management Write Data.
W MII Management Operation Mode
Defines the operation of PHY.
When set, the PHY is in read operation mode.
When clear, the PHY is in write operation mode.
R MII Management Data In.
R/W Flow control enable bit in full-duplex mode. The bit can be set when EEPROM
loading.
0: Disable flow-control.
1: Enable flow-control.
X Reserved
5.6 TC5299J Core Registers Assignment
All registers are 8-bit wide and mapped into four pages, which are selected in the Command Register (PS0, PS1).
-15-
Ver. 0.1
07/04/01