MC80F0224 Datasheet, PDF (96/128 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC80F0208/16/24
Preliminary
Example: During Timer1 interrupt is in progress, INT0 interrupt
serviced without any suspend.
TIMER1: PUSH
PUSH
PUSH
LDM
LDM
EI
:
:
A
X
Y
IENH,#80H
IENL,#0
;Enable INT0 only
;Disable other int.
;Enable Interrupt
19.5 External Interrupt
The external interrupt on INT0, INT1, INT2 and INT3 pins are
edge triggered depending on the edge selection register IEDS (ad-
dress 0EE_H) as shown in Figure 19-8.
:
:
:
:
LDM
LDM
POP
POP
POP
RETI
IENH,#0FFH
IENL,#0FFH
Y
X
A
;Enable all interrupts
The edge detection of external interrupt has three transition acti-
vated mode: rising edge, falling edge, and both edge.
01
INT0 pin
10
11
INT0IF
INT0 INTERRUPT
INT1 pin
01
10
INT1IF
INT1 INTERRUPT
11
INT2 pin
01
10
INT2IF
11
INT2 INTERRUPT
INT3 pin
01
10
INT3IF
11
2 22
IEDS
[0EEH]
2
Edge selection
Register
INT3 INTERRUPT
Figure 19-8 External Interrupt Block Diagram
INT0 ~ INT3 are multiplexed with general I/O ports (R10, R11,
R12, R50). To use as an external interrupt pin, the bit of port se-
lection register PSR0 should be set to “1” correspondingly.
Example: To use as an INT0 and INT2
:
;**** Set external interrupt port as pull-up state.
LDM PU1,#0000_0101B
;
;**** Set port as an external interrupt port
LDM PSR0,#0000_0101B
;
;**** Set Falling-edge Detection
LDM IEDS,#0001_0001B
:
Response Time
The INT0 ~ INT3 edge are latched into INT0IF ~ INT3IF at every
machine cycle. The values are not actually polled by the circuitry
until the next machine cycle. If a request is active and conditions
are right for it to be acknowledged, a hardware subroutine call to
the requested service routine will be the next instruction to be ex-
ecuted. The DIV itself takes twelve cycles. Thus, a minimum of
twelve complete machine cycles elapse between activation of an
external interrupt request and the beginning of execution of the
first instruction of the service routine.
Figure 19-9 shows interrupt response timings.
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