CP80S54 Datasheet, PDF(5/47 Page) List of Unclassifed Manufacturers – EPROM/ROM-Based 8-Bit Microcontroller Series

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CP80S54 Datasheet, PDF (5/47 Pages) List of Unclassifed Manufacturers – EPROM/ROM-Based 8-Bit Microcontroller Series

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CP80S54/56

1.2 Data Memory Organization

Data memory is composed of Special Function Registers and General Purpose Registers.

The General Purpose Registers are accessed either directly or indirectly through the FSR register.

The Special Function Registers are registers used by the CPU and peripheral functions to control the

operation of the device.

TABLE 1.1: Registers File Map for CP8054/56 Series

Address

Description

00h

INDF

01h

TMR0

02h

PCL

03h

STATUS

04h

FSR

05h

PORTA

06h

PORTB

07h

General Purpose Register

08h

PCON

09h

WUCON

0Ah

PCHBUF

0Bh

PDCON

0Ch

ODCON

0Dh

PHCON

0Eh

INTEN

0Fh

INTFLAG

10h ~ 3Fh

General Purpose Registers

N/A OPTION

05h

IOSTA

06h

IOSTB

TABLE 1.2: The Registers Controlled by OPTION or IOST Instructions

Address

Name

N/A (w) OPTION

INTEDG T0CS T0SE PSA

PS2

PS1

PS0

05h (w)

IOSTA

Port A I/O Control Register

06h (w)

IOSTB

Port B I/O Control Register

TABLE 1.3: Operational Registers Map

Address

Name

00h (r/w)

INDF

Uses contents of FSR to address data memory (not a physical register)

01h (r/w)

TMR0

8-bit real-time clock/counter

02h (r/w)

PCL

Low order 8 bits of PC

03h (r/w) STATUS GP2

GP1

GP0

04h (r/w)

FSR

Indirect data memory address pointer

05h (r/w) PORTA IOA7 IOA6 IOA5 IOA4 IOA3 IOA2 IOA1 IOA0

06h (r/w) PORTB IOB7 IOB6 IOB5 IOB4 IOB3 IOB2 IOB1 IOB0

07h (r/w) SRAM

General Purpose Register

08h (r/w) PCON WDTE EIS LVDTE ROC

09h (r/w) WUCON WUB7

0Ah (r/w) PCHBUF (2)

WUB6

WUB5

WUB4

WUB3

WUB2 WUB1 WUB0

2 MSBs Buffer of PC

0Bh (r/w) PDCON /PDB3 /PDB2 /PDB1 /PDB0 /PDA3 /PDA2 /PDA1 /PDA0

0Ch (r/w) ODCON ODB7 ODB6 ODB5 ODB4 ODB3 ODB2 ODB1 ODB0

0Dh (r/w) PHCON /PHB7 /PHB6 /PHB5 /PHB4 /PHB3 /PHB2 /PHB1 /PHB0

0Eh (r/w) INTEN

GIE

INTIE

PBIE

T0IE

0Fh (r/w) INTFLAG

INTIF PBIF

T0IF

Legend: - = unimplemented, read as â0â, * = unimplemented, read as â1â

Note 1 : There is only 1 bit in CP80S54/S54E. And there are 2 bits in CP80S56/S56E.

Rev0.1 Nov 30, 2005

P.5/CP80S54/S56

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