CP80S54 Datasheet, PDF (26/47 Pages) List of Unclassifed Manufacturers – EPROM/ROM-Based 8-Bit Microcontroller Series

CP80S54/56
3.0 INSTRUCTION SET
Mnemonic,
Operands
Description
Operation
BCR
R, bit Clear bit in R
0 Æ R<b>
BSR
R, bit Set bit in R
1 Æ R<b>
BTRSC R, bit Test bit in R, Skip if Clear
Skip if R<b> = 0
BTRSS R, bit Test bit in R, Skip if Set
Skip if R<b> = 1
NOP
CLRWDT
OPTION
SLEEP
INT
DAA
DAS
RETURN
RETFIE
CLRA
No Operation
No operation
Clear Watchdog Timer
00h Æ WDT,
00h Æ WDT prescaler
Load OPTION register
ACC Æ OPTION
Go into power-down mode
00h Æ WDT,
00h Æ WDT prescaler
S/W interrupt
PC + 1 Æ Top of Stack,
002h Æ PC
Adjust ACC’s data format from
HEX to DEC after any addition ACC(hex) Æ ACC(dec)
operation
Adjust ACC’s data format from
HEX to DEC after any subtraction ACC(hex) Æ ACC(dec)
operation
Return from subroutine
Top of Stack Æ PC
Return from interrupt, set GIE bit
Top of Stack Æ PC,
1 Æ GIE
Clear ACC
00h Æ ACC
IOST R Load IOST register
ACC Æ IOST register
CLRR R Clear R
00h Æ R
MOVAR R Move ACC to R
ACC Æ R
MOVR R, d Move R
R Æ dest
DECR R, d Decrement R
DECRSZ R, d Decrement R, Skip if 0
INCR R, d Increment R
INCRSZ R, d Increment R, Skip if 0
ADDAR R, d Add ACC and R
R - 1 Æ dest
R - 1 Æ dest,
Skip if result = 0
R + 1 Æ dest
R + 1 Æ dest,
Skip if result = 0
R + ACC Æ dest
SUBAR R, d Subtract ACC from R
R - ACC Æ dest
ADCAR R, d Add ACC and R with Carry
R + ACC + C Æ dest
SBCAR R, d Subtract ACC from R with Carry R + ACC + C Æ dest
ANDAR R, d AND ACC with R
ACC and R Æ dest
IORAR R, d Inclusive OR ACC with R
ACC or R Æ dest
XORAR R, d Exclusive OR ACC with R
R xor ACC Æ dest
COMR R, d Complement R
RLR
R, d Rotate left f through Carry
R Æ dest
R<7> Æ C,
R<6:0> Æ dest<7:1>,
C Æ dest<0>
Cycles
1
1
1/2 ⁽¹⁾
1/2 ⁽¹⁾
1
1
1
1
2
Status
Affected
-
-
-
-
-
TO _, PD
-
TO _, PD
-
1
C
1
2
2
1
1
1
1
1
1
1/2 ⁽¹⁾
1
1/2 ⁽¹⁾
1
1
1
1
1
1
1
1
1
-
-
-
Z
-
Z
-
Z
Z
-
Z
-
C, DC, Z
C, DC, Z
C, DC, Z
C, DC, Z
Z
Z
Z
Z
C
Rev0.1 Nov 30, 2005
P.26/CP80S54/S56