CP80S54 Datasheet, PDF (10/47 Pages) List of Unclassifed Manufacturers – EPROM/ROM-Based 8-Bit Microcontroller Series

CP80S54/56
2.1.6 PORTA & PORTB (Port Data Registers)
Address
05h (r/w)
06h (r/w)
Name
PORTA
PORTB
B7
IOA7
IOB7
B6
IOA6
IOB6
B5
IOA5
IOB5
B4
IOA4
IOB4
B3
IOA3
IOB3
B2
IOA2
IOB2
B1
IOA1
IOB1
B0
IOA0
IOB0
Reading the port (PORTA, PORTB register) reads the status of the pins independent of the pin’s input/output modes.
Writing to these ports will write to the port data latch.
PORTA and PORTB are 8-bit port data Registers.
2.1.7 PCON (Power Control Register)
Address
Name
B7
B6
B5
B4
B3
B2
B1
B0
08h (r/w) PCON WDTE EIS LVDTE ROC
-
-
-
-
Bit3:Bit0 : Not used. Read as “0”s.
ROC : R-option function of IOA0 and IOA1 pins enable bit.
= 0, Disable the R-option function.
= 1, Enable the R-option function. In this case, if a 430KΩ external resister is connected/disconnected to Vss,
the status of IOA0 (IOA1) is read as “0”/”1”.
LVDTE : LVDT (low voltage detector) enable bit.
= 0, Disable LVDT.
= 1, Enable LVDT.
EIS : Define the function of IOB0/INT pin.
= 0, IOB0 (bi-directional I/O pin) is selected. The path of INT is masked.
= 1, INT (external interrupt pin) is selected. In this case, the I/O control bit of IOB0 must be set to “1”. The path
of Port B input change of IOB0 pin is masked by hardware, the status of INT pin can also be read by way
of reading PORTB.
WDTE : WDT (watch-dog timer) enable bit.
= 0, Disable WDT.
= 1, Enable WDT.
2.1.8 WUCON (Port B Input Change Interrupt/Wake-up Control Register)
Address
09h (r/w)
Name
WUCON
B7
WUB7
B6
WUB6
B5
WUB5
B4
WUB4
B3
WUB3
B2
WUB2
B1
WUB1
B0
WUB0
WUB0 : = 0, Disable the input change interrupt/wake-up function of IOB0 pin.
= 1, Enable the input change interrupt/wake-up function of IOB0 pin.
WUB1 : = 0, Disable the input change interrupt/wake-up function of IOB1 pin.
= 1, Enable the input change interrupt/wake-up function of IOB1 pin.
WUB2 : = 0, Disable the input change interrupt/wake-up function of IOB2 pin.
= 1, Enable the input change interrupt/wake-up function of IOB2 pin.
WUB3 : = 0, Disable the input change interrupt/wake-up function of IOB3 pin.
= 1, Enable the input change interrupt/wake-up function of IOB3 pin.
WUB4 : = 0, Disable the input change interrupt/wake-up function of IOB4 pin.
Rev0.1 Nov 30, 2005
P.10/CP80S54/S56