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SDA9489X Datasheet, PDF (27/102 Pages) List of Unclassifed Manufacturers – PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs
SDA 9489X
SDA 9589X
Preliminary Data Sheet
System Description
SDA 9589X and SDA 9489X allow multiple scan rates for the use in desktop video
applications, VGA compatible or 100Hz TV sets. All features are provided in ’normal’
operating modes at auto detected 50Hz and 60 Hz parent and inset standards. 2fH
modes (100/120Hz and progressive) are supported by line frequency- and pixel clock
doubling and are not detected automatically. Even on a 16:9 picture tube correct aspect
ratio can be displayed by selecting the suitable parent clock. The video synthesizer
generates also a special pixel clock for VGA display (see chapter 5.5.9 for details). As
(S)VGA consists of a variety of scan rates the correct aspect ratio is not adjustable for
all modes with the parent clock (HZOOM) because of the limited count of frequencies.
For single PIP only, correct aspect ratio is maintained by the vertical and horizontal
scaler (HSHRINK and VSHRINK).
It is possible to display (S)VGA sources for parent display, as long as the horizontal
frequency is lower than 40 kHz and the signal does not contain more than 1023 lines.
For progressive scan mode, PROGEN must be set. Additionally field-mode should be
forced to prevent unallowed frame-mode displaying (FIESEL). As the (S)VGA normally
does not fit to the display raster generated in the vertical noise suppression, VSPNSRQ
should be disabled. (S)VGA signals for inset channel are not supported.
PROGEN
0
0
1
1
READD
0
1
0
1
Expected input signal
50 or 60 Hz signal interlace
100 or 120 Hz signals interlace
(reserved)
50 or 60 Hz or (S)VGA signal progressive
Table 4-15 Selection of display field repetition
4.7.3
Display standard
For a single-PiP, the number of displayed lines depends on the selected picture size and
on the signal standard. For multi picture display, the number of displayed lines depends
on the selected picture size and on the signal standard of the parent signal. Additionally,
a standard can be forced by DISPSTD.
Micronas
4-27